A printed wiring board includes a base layer having insulating properties, a first conductive layer directly or indirectly stacked on the base layer front surface, and including a copper foil, a second conductive layer directly or indirectly stacked on the base layer back surface, and including a copper foil, a stacked body for a via hole, the stacked body being stacked on an inner periphery and a bottom of a connection hole that extends through the first conductive layer and the base layer in a thickness direction, and being configured to electrically connect the first conductive layer and the second conductive layer to each other, and having an electroless copper plating layer. Each copper foil contains a copper crystal grain oriented in a plane orientation, and an average crystal grain size of copper of each copper foil is 10 μm or greater, the electroless copper plating layer includes palladium.

A wiring substrate includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on the insulating layer, a connection conductor penetrating through the insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer and adhering the first conductor layer and the insulating layer. The first conductor layer includes a conductor pad in contact with the connection conductor such that the conductor pad has a surface having a first region and a second region on second conductor layer side and that surface roughness of the first region is different from surface roughness of the second region, and the conductor pad of the first conductor layer is formed such that the first region is covered by the coating film and that the second region is covered by the connection conductor.

A method for manufacturing a circuit board embeds a portion of an outer circuit layer in an outer dielectric layer which increases contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the finished circuit board.

A circuit board with via capacitor structure is introduced herein, including a base, a deposition layer, disposed on the base, having at least a via in the deposition layer, at least a thin film capacitor, each thin film capacitor disposed in each via, each thin film capacitor having a body, a second terminal, and a first terminal, the second terminal and the first terminal located on two opposite sides of the body; at least a first electrode, each first electrode electrically connected to the first terminal of each thin film capacitor; and at least a second electrode, each second electrode electrically connected to the second terminal of each thin film capacitor.

A circuit board includes an inner circuit substrate and an outer circuit substrate electrically connected to the inner circuit substrate. The outer circuit substrate includes an outer dielectric layer and an outer circuit layer facing the inner circuit substrate embedded in the outer dielectric layer. A portion of the outer circuit layer facing away from the inner circuit substrate protruding from the outer dielectric layer. The circuit board can increase contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the circuit board.

In one aspect, a PCB is provided. The PCB includes at least one insulating layer, a blind slot, and at least one via. The at least on insulating layer includes a first surface and a second surface opposite the first surface. The blind slot is plated and formed in the at least one insulating layer, where the blind slot partially extends from the first surface to the second surface, and where the blind slot includes a conductive plating bonded along a major surface of the blind slot. The at least one via is electrically conductive and filled, where the at least one via is coupled with and extends between the conductive plating of the blind slot and the second surface of the at least one insulating layer.

A printed circuit board including: a first insulating layer; a first wiring layer disposed on an upper surface of the first insulating layer, and including a first wiring portion and a second wiring portion; and a second insulating layer disposed on the upper surface of the first insulating layer, having a cavity exposing an upper surface of the second wiring portion, and including a first insulating portion covering the first wiring portion and a second insulating portion whose upper surface is exposed from the cavity, wherein one or more gaps are provided between the second wiring portion and the second insulating portion.

A method for manufacturing a wiring board includes preparing a core substrate having first and second surfaces, forming a first build-up structure including interlayer insulating layers and conductor layers on the first surface of the substrate, and forming a second build-up structure including interlayer insulating layers and one or more conductor layers on the second surface of the substrate. The forming of the first structure includes laminating the insulating layers and metal layers on first surface side of the substrate and forming the conductor layers from all of the metal layers on the first surface side, and the forming of the second structure includes laminating the insulating layers and metal layers on second surface side of the substrate, forming the one or more conductor layers from one or more of the metal layers on the second surface side, and entirely removing the other metal layers on the second surface side.

There are provided a printed circuit board including: an insulation layer in which a via hole is formed; vias formed in the via hole; first circuit patterns formed below the insulation layer and electrically connected to the vias; and second circuit patterns formed on the insulation layer to be bonded to the vias; wherein the via has a diameter smaller than that of the via hole, and a method of manufacturing a printed circuit board.

Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.