A printed circuit board according to one embodiment of the present invention is a printed circuit board including a plate-shaped or a sheet-shaped insulating material having a penetrating hole, and a metal plating layer layered on both surfaces of the insulating material and an inner peripheral surface of the insulating material, wherein an inner diameter of the penetrating hole monotonically decreases from a top surface of the insulating material toward a back surface, and wherein the inner diameter of the penetrating hole at a center in a thickness direction of the insulating material is smaller than an average of an opening diameter on the top side and an opening diameter on the back side.

A conductive slurry for plating comprises a carbon material, a dispersant, a binder, and a solvent. The carbon material, the dispersant and the binder are uniformly mixed in the solvent. The weight percentage of the carbon material is between 0.1% and 1%. The carbon material comprises a carbon nanotube, graphene, or a combination thereof. A plating method for a circuit board, which utilizes the conductive slurry, is also disclosed. The circuit board comprises at least a through hole. The plating method comprises a coating step, a first cleaning step, a first drying step, a first micro-etching step, a second cleaning step, an anti-oxidation step, a third cleaning step, a plating step, and a second drying step.

A printed circuit board is provided. The printed circuit board includes an insulating material, and a circuit comprising a first region that partially penetrates the insulating material, and a second region formed on the first region and that protrudes from an upper portion of the insulating material, the first region includes a first electroplating layer and a first electroless plating layer that are formed between the insulating material and the first electroplating layer.

A microwave dielectric component (100) comprises a microwave dielectric substrate (101) and a metal layer, the metal layer being bonded to a surface of the microwave dielectric substrate (101). The metal layer comprises a conductive seed layer and a metal thickening layer (105). The conductive seed layer comprises an ion implantation layer (103) implanted into the surface of the microwave dielectric substrate (101) and a plasma deposition layer (104) adhered on the ion implantation layer (103). The metal thickening layer (105) is adhered on the plasma deposition layer (104). A manufacturing method of the microwave dielectric component (100) is further disclosed.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and blanket surface plasma etch operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.

A liquid-phase process is provided for depositing metal layers in holes of an electronic module placed in a hermetic chamber, from a chemical liquid containing metal compounds intended to form a metal layer. The holes have a depth P and a diameter D such that D>80 m and P/D>10, and the process comprises at least one cycle comprising the following substeps: M1) bringing the chamber to a preset pressure P0 and filling the chamber with the liquid; M2) degassing the holes by bringing the chamber to a low pressure P1, with P1<P0; M3) returning the chamber to the pressure P0 and filling the chamber with the liquid; M4) depositing, in the holes, a metal layer issued from the liquid; M5) emptying the liquid from the chamber; and M6) explosively evaporating the liquid remaining in the holes by bringing the chamber to a low pressure P2, with P2<P1<P0; and reiterating the cycle comprising substeps M1 to M6 at least once in order to obtain one new metal layer per iteration.

An article includes a wafer having a body which defines a first surface and a second surface. The wafer defines a via having a via surface extending between the first and second surfaces through the body. An adhesion layer is positioned on the via surface. At least a portion of the via surface is free of the adhesion layer. A metallic component is positioned within the via and extends from the first surface to the second surface.

A catalytic resin is formed by mixing a resin and either homogeneous or heterogeneous catalytic particles, the resin infused into a woven glass fabric to form an A-stage pre-preg, the A-stage pre-preg cured into a B-stage pre-preg, thereafter held in a vacuum and between pressure plates at a gel point temperature for a duration of time sufficient for the catalytic particles to migrate away from the resin rich surfaces of the pre-preg, thereby forming a C-stage pre-preg after cooling. The C-stage pre-preg subsequently has trenches formed by removing the resin rich surface, the trenches extending into the depth of the catalytic particles, optionally including drilled holes to form vias, and the C-stage pre-preg with trenches and holes placed in an electroless bath, whereby traces form in the trenches and holes where the surface of the cured pre-preg has been removed.

An article includes a wafer having a body which defines a first surface and a second surface. The wafer defines a via having a via surface extending between the first and second surfaces through the body. An adhesion layer is positioned on the via surface. At least a portion of the via surface is free of the adhesion layer. A metallic component is positioned within the via and extends from the first surface to the second surface.

A component carrier includes an electrically insulating layer structure having a first main surface and a second main surface with a through hole extending through the electrically insulating layer structure between the first main surface and the second main surface. An electrically conductive bridge structure connects opposing sidewalls of the electrically insulating layer structure delimiting the through hole. A vertical thickness of the electrically insulating layer structure is not more than 200 m and a narrowest vertical thickness of the bridge structure is at least 20 m.