A method for producing a printed circuit board having at least one embedded electronic component, in which a support layer and a positioning layer having a recess somewhat larger than the corresponding base area of the printed circuit board module are provide, the positioning layer is placed on the support layer and the printed circuit board module inserted into the recess in the positioning layer. The printed circuit board module is positioned without soldering or gluing, and at least one electrically insulating layer placed on the printed circuit board module and the positioning layer surrounding the printed circuit board module. An electrically conductive layer is placed on the at least one electrically insulating layer covering the printed circuit board module, and the layer sequence is pressed. The bores in the pressed layer sequence are metallized.

A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.

The present invention relates to methods and systems for deposition of metal conductors using asymmetrical electrolytic plating, in which one surface (e.g., top) of a substrate is coated with an electrical conductor, and an opposite (e.g., bottom, or other) surface of which is not coated. A channel is formed between the two sides of the substrate, passing through the substrate and, in some embodiments, passing through the conductor. Electrolytic plating is performed such that metal is deposited from the edge of the conduct proximal to the channel, along the side walls of the channel, and up to, and in some embodiments on to, the other side of the substrate. Use of etching or plate resist layers are also contemplated.

The present invention relates to methods and systems for deposition of metal conductors using asymmetrical electrolytic plating, in which one surface (e.g., top) of a substrate is coated with an electrical conductor, and an opposite (e.g., bottom, or other) surface of which is not coated. A channel is formed between the two sides of the substrate, passing through the substrate and, in some embodiments, passing through the conductor. Electrolytic plating is performed such that metal is deposited from the edge of the conduct proximal to the channel, along the side walls of the channel, and up to, and in some embodiments on to, the other side of the substrate. Use of etching or plate resist layers are also contemplated.

The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 μm.

The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.

A memory card comprising a first main surface and a second main surface opposing each other, and including a printed circuit board (PCB) constituting the first main surface, the PCB including a plurality of first external connection terminals, the plurality of first external connection terminals exposed on the first main surface, a plurality of memory devices stacked on the PCB, a memory controller configured to control the plurality of memory devices, a molding layer encapsulating the plurality of memory devices and the memory controller, the molding layer constituting the second main surface, and one or more second external connection terminals electrically connected to the memory controller, the one or more second external connection terminals embedded in the molding layer and exposed by the molding layer on the second main surface may be provided.

A printed circuit board includes a printed wiring board, a semiconductor element, and conductive members. The printed wiring board includes an insulative substrate having a first surface and a second surface opposite to the first surface, and wiring provided on the second surface of the insulative substrate to face the through-holes. The insulative substrate has flexibility and through-holes passing through the insulative substrate from the first surface to the second surface. The semiconductor element is mounted on the first surface of the insulative substrate of the printed wiring board and has element terminals interposed between the printed wiring board and the semiconductor element. The conductive members filled in the through-holes connect the element terminals and the wiring.

A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.

A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.