Patent classifications
H05K3/425
Implementing customized PCB via creation through use of magnetic pads
A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
Segmented via for vertical PCB interconnect
Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.
IMPLEMENTING CUSTOMIZED PCB VIA CREATION THROUGH USE OF MAGNETIC PADS
A method and apparatus for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
Printed circuit board having EMI shielding function, method for manufacturing the same, and flat cable using the same
The present disclosure relates a printed circuit board having an EMI shielding function. In an example embodiment, the printed circuit board includes a substrate, a signal unit disposed on the substrate, a ground unit disposed in parallel with the signal unit, an insulation layer disposed above the substrate and covering the signal unit and the ground unit, an EMI shielding layer disposed on the insulation layer and under the substrate, respectively, and a shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate.
Multi-layer circuit board using interposer layer and conductive paste
A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.
Implementing customized PCB via creation through use of magnetic pads
A method and apparatus are provided for implementing customized printed circuit board (PCB) via creation through use of magnetic capture pads. At least one magnetic capture pad is rendered before aqueous seed and plate processing in the PCB manufacture. The magnetic capture pad selectively provides seed material rendering copper in at least one selected region of the via.
COUPLED VIA STRUCTURE, CIRCUIT BOARD HAVING THE COUPLED VIA STRUCTURE
A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.
Printed wiring board and method of manufacturing the same
A printed wiring board according to an aspect of the present invention includes an insulating resin, a plated copper formed on a front surface side of the insulating resin, and a plated copper formed on a back surface side of the insulating resin. The plated copper and the plated copper are electrically connected via a plated copper that fills a through hole penetrating the insulating resin from the front surface side to the back surface side. Furthermore, the through hole includes a conical section whose opening diameter decreases from the front surface side to the back surface side of the insulating resin, and a cylindrical section that communicates with the conical section at a bottom surface of the conical section.
PRINTED CIRCUIT BOARD
A printed circuit board includes: a first insulating layer; a via pad disposed on an upper surface of the first insulating layer; a second insulating layer disposed on the upper surface of the first insulating layer and having a via hole exposing at least a portion of an upper surface of the via pad; a conductor pattern disposed on the exposed upper surface of the via pad; and a via including a first metal layer covering at least a portion of each of a wall surface of the via hole, the exposed upper surface of the via pad, and the conductor pattern, and a second metal layer disposed on the first metal layer and disposed in at least a portion of the via hole.
Method for manufacturing traces of PCB
A method for manufacturing traces of a printed circuit board (PCB) comprises an application of the periodic pulse reverse (PPR) pattern plating process. In the first stage, walls and bottoms in drilled holes of the PCB are modified with reduced graphene oxide (rGO) so that the vias can be formed by filling with copper and a very thin copper layer can be formed on the substrate through the electroplating process. In the second stage, a pattern of very fine traces with width/space less than 30/30 m is formed on the thin copper layer and then the traces are formed through the PPR pattern plating process. After removing unwanted copper layer, the traces with even thicknesses and square profiles are achieved and thus conform to requirements of the high density interconnection (HDI) technology.