The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

A resin multilayer substrate includes a multilayer body including resin layers and adhesive layers that are laminated, via conductors in the resin layers, and bonding portions in the adhesive layers. The bonding portion is connected to the via conductor. One of the resin layer and the adhesive layer is a gas high-permeable layer having a higher gas permeability than the other one. The bonding portion includes an organic substance, or has a higher void content rate per unit plane sectional area than the via conductor. At least a portion of each of the bonding portions contacts the gas high-permeable layers.

A printed circuit board according to an embodiment includes: a first insulating portion having a cavity; a second insulating portion disposed on the first insulating portion; a third insulating portion disposed under the first insulating portion; and an electronic device disposed in the cavity, wherein a number of layers of the second insulating portion is different from a number of layers of the third insulating portion, and has an asymmetric structure with respect to the first insulating portion in which the electronic device is disposed.

A board-to-board connecting structure which adds no significant thickness to a single printed circuit board includes a first circuit board and a second circuit board. The first circuit board includes first circuit substrate, adhesive layer, and second circuit substrate. The first circuit substrate includes first base layer, first inner wiring layer with first pad, and first outer wiring layer defining a receiving space. The second circuit substrate includes insulating layer and two second outer wiring layers. A conductive via in the second circuit substrate connects the two second outer wiring layers. The second circuit board includes second base layer and also two third outer wiring layers each with a second pad. The second circuit board is laterally disposed in the receiving space and one second pad connects to the conductive via and the other to the first pad.

A wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are stacked on and contact one another. The conductive through via extends through the dam portions.

A wiring substrate is manufactured by attaching an adhesive protective film to a metal-foiled laminate sheet, forming bottomed via holes by partially removing the film and an insulating film, filling conductive pastes into the holes, and peeling the film. A wiring substrate is manufactured by forming an adhesive protective layer so as to cover a patterned metal foil on a metal-foiled laminate sheet, forming bottomed step via holes by partially removing the layer and an insulating film, filling conductive pastes into the holes, and peeling off a protective film. The wiring substrate and the second wiring substrate are laminated in such a way that protruding parts of the pastes come into contact with respective protruding parts of the pastes.

A method of manufacturing component carriers includes carrying out a test for each of multiple sections of a component-carrier structure, inserting at least one functional component in each of further sections of a further component-carrier structure to be connected with the component-carrier structure so that each further section assigned to a respective section having successfully passed the test is provided with at least one functional component, and inserting at least one functionally inactive dummy component in each of the further sections assigned to a respective section having failed the test.

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.

A method of making a wiring board includes forming a first capacitor carrier layer with a first embedded chip capacitor, a first insulation layer disposed on an upper surface, a second insulation layer disposed on a lower surface, first upper and lower conductive vias in conductive contact with a first electrode, and second upper and lower conductive vias in conductive contact with a second electrode. The method also includes forming a second capacitor carrier layer similar to the first. The method further includes forming a bonded laminate comprising in sequence an upper insulation layer, the first capacitor carrier layer, a center insulation layer, the second capacitor carrier layer, and a lower insulation layer. The method also includes forming a through-hole through the laminate and forming a conductive coating within the through-hole to provide a conductive through-hole. A wiring board also includes the bonded laminate and the embedded capacitors.

A method for manufacturing a circuit board comprises steps of providing a single-sided board comprising a first insulating base, a copper layer, and at least one first conductive structure; providing a laminated board comprising a metal layer, a third insulating base, a metal shielding layer, and a second insulating base; forming a wiring layer by the metal layer comprising at least one signal wire and at least one connecting pad; defining at least one second through hole each passing through the second insulating base, the metal shielding layer, and the third insulating base; forming a second conductive structure in each second through hole; providing a double-sided board comprising a wiring layer, a fourth insulating base, a first copper foil; and at least one third conductive structure; pressing the single-sided board, at least one middle structure, and the double-sided board in that sequence to form the circuit board.