A manufacturing method of a composite substrate is provided. A first conductive layer is formed on a first liquid crystal polymer layer. The first conductive layer is patterned to form a patterned first conductive layer. A second liquid crystal polymer layer including a soluble liquid crystal polymer is formed to cover the patterned first conductive layer. The second liquid crystal polymer layer which is on the patterned first conductive layer is removed.

A method of manufacturing a component-embedded substrate includes a resist forming step in which a patterning resist is formed on a support, a patterning step in which a through hole extending through the resist is formed by performing patterning on the resist, a first-electrode forming step in which a through-via electrode is formed by filling the through hole with an electrode material, a resist removing step in which the resist is removed, a component placement step in which an electronic component is placed, a substrate forming step in which a resin substrate is formed by sealing the electronic component with a resin that includes a filler having a diameter larger than the surface roughness of a side surface of the through-via electrode, and a removing step in which the support is removed from the resin substrate. The first-electrode forming step is performed before the substrate forming step is performed.

A circuit board element includes a glass substrate, a first dielectric layer, and a first patterned metal layer. The glass substrate has an edge. The first dielectric layer is disposed on the glass substrate and has a central region and an edge region. The edge region is in contact with the edge of the glass substrate, and the thickness of the central region is greater than the thickness of the edge region. The first patterned metal layer is disposed on the glass substrate and in the central region of the first dielectric layer.

A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.

A flexible printed circuit board includes a base layer and a pattern line. At least one communication hole penetrating opposite surfaces of the base layer. The pattern line includes two conductive circuit layers formed on the opposite surfaces of the base layer. At least one conductive pole are formed in the at least one communication hole and electrically connects the two conductive circuit layers. A gap being is formed between the conductive pole and the base layer.

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

A printed wiring board includes a resin insulating layer, a conductor circuit formed on the resin insulating layer, an outermost resin layer formed on the resin insulating layer such that the outermost resin layer covers the conductor circuit, and multiple metal posts formed on the conductor circuit such that the metal posts have end portions exposed from the outermost resin layer and that the metal posts form a pad group. The outermost resin layer has a dam structure forming part of the outermost resin layer such that the dam structure is formed to surround at least part of the pad group including the metal posts.

A multilayer wiring board includes a first insulating layer, a second insulating layer stacked on the first insulating layer, a via conductor inside each of the first insulating layer and the second insulating layer, and a conductive bonding layer that bonds the via conductors to each other. The first insulating layer is directly bonded to the second insulating layer, and a relationship a.sub.1>b.sub.1 is satisfied, where a.sub.1 is a maximum diameter of the bonding layer and b.sub.1 is a maximum diameter of the via conductor at an interface with the bonding layer.

A multi-phase busbar can include a first conducting layer, a first conducting pin, a first insulating layer, and a second conducting layer. The first conducting layer can include a sheet metal coated with an electrically insulating material. The first conducting pin can be mounted to the first conducting layer. The first conducting pin can extend in a direction perpendicular to the first conducting layer. The first insulating layer of a rigid insulating material can be arranged on the first conducting layer. The first insulating layer can define an opening through which the first conducting pin projects. The second conducting layer can include a sheet metal coated with an electrically insulating material, the second conducting layer comprising a first pinhole through which the first conducting pin projects and a second conducting pin which extends in a direction parallel to the first conducting pin.

A method includes the following steps. A seed layer is formed over a structure having at least one semiconductor die. A first patterned photoresist layer is formed over the seed layer, wherein the first patterned photoresist layer includes a first opening exposing a portion of the seed layer. A metallic wiring is formed in the first opening and on the exposed portion of the seed layer. A second patterned photoresist layer is formed on the first patterned photoresist layer and covers the metallic wiring, wherein the second patterned photoresist layer includes a second opening exposing a portion of the metallic wiring. A conductive via is formed in the second opening and on the exposed portion of the metallic wiring. The first patterned photoresist layer and the second patterned photoresist layer are removed. The metallic wiring and the conductive via are laterally wrapped around with an encapsulant.