A wiring substrate includes a core layer, first conductor layers including a first inner conductor layer, a first outer conductor layer and a first intermediate conductor layer, second conductor layers including a second inner conductor layer, a second outer conductor layer and a second intermediate conductor layer, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, and the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer and includes a conductor pattern formed such that an upper surface of the conductor pattern has an edge portion forming an inclined portion inclined toward the core layer.

An embedded circuit board made without gas bubbles or significant internal gaps according to a manufacturing method which is here disclosed comprises an inner layer assembly, an embedded element, and first and second insulating elements. The inner layer assembly comprises a first main portion with opposing first and second surfaces, a first groove not extending to the second surface is positioned at the first surface. A first opening penetrates the second surface, and the first opening and the first groove are connected. The first groove carries electronic elements for embedment. The first insulating element covers the first surface and a surface of the embedded element away from the second surface. The second insulating element covers the second surface and extends into the first opening to be in contact with the embedded element.

A circuit board includes a wiring board. The wiring board includes a first wiring layer, a dielectric layer and a second wiring layer stacked, and a plurality of spaced conductive pillars. Each conductive pillar connects the first wiring layer and the second wiring layer. A groove is recessed from a side of the dielectric layer facing away from the second wiring layer, and includes first recessed portion and at least two spaced second recessed portions recessed from a sidewall of the first recessed portion. An end surface of each conductive pillar is exposed from the at least two spaced second recessed portions, and a sidewall of each pillar close to the first recessed portion is exposed from the second recessed portion. At least one electronic component is received in the first recessed portion, and is connected to the conductive pillars through electrical connecting portions received in the second recessed portions.

A wiring substrate includes: a base material; a first through-hole and a second through-hole that are formed in the base material; magnetic material that is filled in the first through-hole; a third through-hole that is formed in the magnetic material; a first plating film that covers an inner wall surface of the third through-hole; and a second plating film that covers an inner wall surface of the second through-hole and the first plating film. The first plating film includes a first electroless plating film that is in contact with the inner wall surface of the third through-hole, and a first electrolytic plating film that is laminated on the first electroless plating film.

A method of manufacturing a base plate includes the following steps: providing a first substrate, the first substrate including a first base layer, a first copper coating and a second copper coating covered on two sides of the first base layer; opening at least one first hole on the first substrate, the first hole penetrating the first base layer and the first copper; forming a first electroplated coating on the first copper coating, the first copper coating filling the first hole to form a first connecting portion; opening at least one second hole on the first connecting portion and the first electroplated coating to form a plurality of second connecting pins.

A packaging structure, includes: a dielectric layer; at least one inner wiring layer embedded in the dielectric layer; at least two outer wiring layers arranged two sides of the at least one inner wiring layer and combined with the dielectric layer; and at least one electronic component embedded in the dielectric layer; each inner wiring layer including at least two spaced supporting pads, and each supporting pad including a main body and a protruding portion extending outward from a periphery of the main body, the packaging structure further including at least two spaced positioning pillars, and each positioning pillar correspondingly connected to one main body, each electronic component arranged between at least two positioning pillars, and an end of each electronic component being in contact with protruding portions of at least two supporting pads, thereby packaging the electronic component accurately.

A method of manufacturing a base plate includes the following steps: providing a first substrate, the first substrate including a first base layer, a first copper coating and a second copper coating covered on two sides of the first base layer; opening at least one first hole on the first substrate, the first hole penetrating the first base layer and the first copper; forming a first electroplated coating on the first copper coating, the first copper coating filling the first hole to form a first connecting portion; opening at least one second hole on the first connecting portion and the first electroplated coating to form a plurality of second connecting pins.

A circuit board includes a wiring board. The wiring board includes a first wiring layer, a dielectric layer and a second wiring layer stacked, and a plurality of spaced conductive pillars. Each conductive pillar connects the first wiring layer and the second wiring layer. A groove is recessed from a side of the dielectric layer facing away from the second wiring layer, and includes first recessed portion and at least two spaced second recessed portions recessed from a sidewall of the first recessed portion. An end surface of each conductive pillar is exposed from the at least two spaced second recessed portions, and a sidewall of each pillar close to the first recessed portion is exposed from the second recessed portion. At least one electronic component is received in the first recessed portion, and is connected to the conductive pillars through electrical connecting portions received in the second recessed portions.

The present disclosure relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.

Resin films, all of which are formed of the same resin material, are laminated to form a laminate. Heat and pressure are applied to the laminate to integrate the resin films into one piece; then the pressure applied to the laminate is released and the laminate is cooled. In a predetermined region of the laminate which is to constitute a bent part, one or more of the resin films are arranged on each of one side and the other side in a lamination direction of the resin films with respect to one conductor pattern; and the total thickness of the one or more resin films arranged on the one side is larger than the total thickness of the one or more resin films arranged on the other side. Consequently, the predetermined region can be bent by utilizing the difference between contraction force generated in the one or more resin films arranged on the one side and contraction force generated in the one or more resin films arranged on the other side during the cooling after the application of heat and pressure.