A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.

A multi-device graded embedding package substrate includes a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer includes a first conductive copper pillar layer and a first device cavity. The second dielectric layer includes a first wiring layer located in a lower surface of the second dielectric layer, a second conductive copper pillar layer and a heat dissipation copper block layer provided on the first wiring layer. The third dielectric layer includes a second wiring layer, a third conductive copper pillar layer provided on the second wiring layer. A first device is attached to the bottom of the first device cavity, and a terminal of the first device is in conductive connection with the second wiring layer. A second device is attached to the bottom of a second device cavity penetrating through the first, second and third dielectric layers.

An integrated fan out package is utilized in which the dielectric materials of different redistribution layers are utilized to integrate the integrated fan out package process flows with other package applications. In some embodiments an Ajinomoto or prepreg material is utilized as the dielectric in at least some of the overlying redistribution layers.

An integrated fan out package is utilized in which the dielectric materials of different redistribution layers are utilized to integrate the integrated fan out package process flows with other package applications. In some embodiments an Ajinomoto or prepreg material is utilized as the dielectric in at least some of the overlying redistribution layers.

A method of producing a multilayer printed circuit board includes a metallic conductor structure including providing a base substrate including a film or plate and having first and second substrate sides, which base substrate at least partly consists of an electrically non-conductive organic polymer material and wherein the first substrate side is covered with a cover metal layer, partially removing the cover metal layer while subdividing the first substrate side into at least one first partial area, in which the first substrate side is free of the cover metal layer, and into at least one second partial area, in which the first substrate side is covered with the cover metal layer, and causing a plasma to act on the first substrate side with the aid of which plasma the polymer material is removed in the at least one first partial area while forming at least one trench.

A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor, and a coating film. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is formed in contact with the connection conductor and that the wiring pattern is covered by the coating film, the conductor pad has a surface facing the second insulating layer and having first surface roughness higher than surface roughness of a surface of the wiring pattern, and the coating film has opening exposing a portion of the surface of the conductor pad from the coating film and having area larger than area of interface between the conductor pad and the connection conductor and that the connection conductor is formed on the portion of the surface of the conductor pad and is separated from the coating film.

A method of making an electrical component includes transmitting electrical energy from a power source through one or more deposition anodes, through an electrolyte solution, and to an intralayer electrical-connection feature of a build plate, such that material is electrochemically deposited onto the intralayer electrical-connection feature and forms an interlayer electrical-connection feature. The method also includes securing a dielectric material so that the dielectric material contacts and electrically insulates the intralayer electrical-connection feature and contacts and at least partially electrically insulates the interlayer electrical-connection feature. The method additionally includes depositing a seed layer onto the dielectric material and the interlayer electrical-connection feature, electrochemically depositing material onto the seed layer, to form at least one second intralayer electrical-connection feature of the electrical component, and removing any one or more portions of the seed layer onto which no portion of the at least one second intralayer electrical-connection feature is formed.

A wiring board includes: a wiring layer; an insulating layer laminated on the wiring layer; an opening portion penetrating through the insulating layer to the wiring layer; a recess portion formed in a surface of the wiring layer exposed from the opening portion of the insulating layer; and a conductor film formed in the opening portion of the insulating layer and the recess portion of the wiring layer, wherein the recess portion of the wiring layer includes a raised portion, which is raised higher than an outer peripheral portion of a bottom surface, at a central portion of the bottom surface.

A printed wiring board includes an insulating layer, and a conductor layer including a solid layer and wirings. The solid layer has an opening part. The wirings are formed in the opening part. The opening part includes first and second opening parts. The wirings include first and second wirings. The first wiring has a first land, a first portion, and a second portion. The second wiring has a second land, a third portion, and a fourth portion extending in parallel to the second portion. A first boundary between the first and second portions is in the second opening part. The first portion is bending at the first boundary and increasing distance between the first and second wirings. A second boundary between the third and fourth portions is in the second opening part. The third portion is bending at the second boundary and increasing distance between the first and second wirings.

A laser processing method according to a viewpoint of the present disclosure includes radiating ultraviolet pulse laser light onto a workpiece having a stacked structure in which a conductor layer, an insulating layer, and a sacrificial layer are stacked on each other in the presented order, the pulse laser light radiated from the side facing the sacrificial layer, to change a laser ablation processing mode in the sacrificial layer and form a through hole in the sacrificial layer, radiating the pulse laser light onto the insulating layer through the through hole to form an opening in the insulating layer, and removing the sacrificial layer after the formation of the opening.