An electronic device and a method for manufacturing a flexible circuit board are provided. The electronic device includes the flexible circuit board. The flexible circuit board includes a first flexible substrate, a first seed layer, a first conductive layer, and a second seed layer. The first seed layer is disposed on the first flexible substrate. The first conductive layer is disposed on the first seed layer. The second seed layer is disposed on the first conductive layer. The first seed layer is in contact with the first conductive layer.

A multi-layer circuit structure is disposed on the delivery loading plate through the bottom-layer circuit structure, the delivery loading plate exposes the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board.

The present disclosure provides an electronic apparatus, a circuit board, and a method of manufacturing the same, which belongs to the field of circuit board technology. The method of manufacturing the circuit board includes: providing a base substrate, forming a first circuit layer on a side of the base substrate, and performing first to N-th circuit stacking operations in sequence, where an n-th circuit stacking operation comprises forming an n-th dielectric layer on a side of an n-th circuit layer away from the base substrate, the n-th dielectric layer having at least one n-th via exposing the n-th circuit layer provided therein, and forming an (n+1)-th circuit layer on a side of the n-th dielectric layer away from the base substrate, the (n+1)-th circuit layer being electrically connected with the n-th circuit layer through the n-th via, N being a positive integer greater than 1, 1≤n≤N, and n being an integer.

A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.

A method for manufacturing a flexible printed circuit board in which base sheets composed of Teflon film having heat resistance and low dielectric constant are stacked to prevent loss of a high frequency signal while minimizing dielectric loss due to the high frequency signal and a flexible printed circuit board manufactured by the same are disclosed. The proposed method for manufacturing a flexible printed circuit board comprises a step of preparing a base sheet which is a Teflon film having a thin film pattern formed on one surface thereof, a step of preparing an adhesive sheet, a step of stacking a plurality of base sheets and adhesive sheets, and a step of heating, pressing, and adhering a stacked body in which the plurality of base sheets and adhesive sheets are stacked.

A method for manufacturing a flexible printed circuit board in which base sheets composed of Teflon film having heat resistance and low dielectric constant are stacked to prevent loss of a high frequency signal while minimizing dielectric loss due to the high frequency signal and a flexible printed circuit board manufactured by the same are disclosed. The proposed method for manufacturing a flexible printed circuit board comprises a step of preparing a base sheet which is a Teflon film having a thin film pattern formed on one surface thereof, a step of preparing an adhesive sheet, a step of stacking a plurality of base sheets and adhesive sheets, and a step of heating, pressing, and adhering a stacked body in which the plurality of base sheets and adhesive sheets are stacked.

Disclosed herein is a thin film capacitor that includes a capacitive insulating film having first and second through holes, a first metal film provided on one surface of the capacitive insulating film, and a second metal film provided on the other surface of the capacitive insulating film. The first and second metal films are made of different metal materials from each other. The first metal film is divided into a first area positioned outside the first space and a second area positioned inside the first space. The second metal film is divided into a third area positioned outside the second space and a fourth area positioned inside the second space. The third area is connected to the second area through the first through hole. The fourth area is connected to the first area through the second through hole.

Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.

Proposed are a multilayer wiring board having both durability and chemical resistance, and a probe card including the same.

A chip package is provided. The chip package includes a semiconductor chip and a semiconductor die over the semiconductor chip. The chip package also includes a dielectric layer over the semiconductor chip and encapsulating the semiconductor die, and the dielectric layer is substantially made of a semiconductor oxide material. The chip package further includes a conductive feature penetrating through a semiconductor substrate of the semiconductor die and physically connecting a conductive pad of the semiconductor chip.