An insulating sheet for use in forming an insulating layer of an interconnect substrate includes a semi-cured insulating resin layer, a semi-cured protective resin layer laminated on an upper surface of the insulating resin layer, and a cover layer laminated on an upper surface of the protective resin layer, wherein the protective resin layer has lower resistance to a predetermined solution than the insulating resin layer has, the predetermined solution being capable of dissolving the insulating resin layer and/or the protective resin layer.

There is described a method of producing a flexible structure and sensor devices incorporating the former, such as wireless LC sensors, that comprises a plurality of thin-film layers of elastomeric material and at least one layer of micro-wrinkled electrically conductive material. The method includes steps leading to 2D wrinkled metallised polydimethylsiloxane (PDMS) layers enabling considerable flexibility with negligible bending failure for angles up to 180 degrees.

The present invention discloses a method for manufacturing a multi-layer flexible circuit board, comprising the steps of: (1) manufacturing a double-sided FPC flexible board; (2) manufacturing a novel material layer structure; (3) hot pressing at least one group of upeer novel material layer structures on the circuits on the upper and/or lower surfaces of the double-sided FPC flexible board; forming a protective layer on the circuits of an outermost novel material layer structure and/or on exposed circuits of the double-sided FPC flexible board so as to obtain a multi-layer flexible circuit board. The present invention also discloses a multi-layer flexible circuit board manufactured by performing the above-mentioned method. The manufacturing process of the present invention is simplified, convenient and efficient; the multi-layer flexible circuit board not only greatly simplifies the novel material layer structure and reduces the overall thickness, but also has the function of high-speed transmission of high-frequency signals, especially suitable for new 5G technology products. It can protect and resist the migration of copper ions when it is energized between circuits so as to ensure the safety and normal operation of circuits.

An electronic device including a connection element is provided. The connection element includes a first metal layer, a first insulation layer, and a second insulation layer. The first insulation layer is disposed on the first metal layer and has a first hole and a second hole. The second insulation layer is disposed on the first insulation layer. The first hole exposes a portion of the first metal layer, and the second insulation layer extends into the second hole. A method of fabricating an electronic device is also provided.

The method for producing a laminate having a patterned metal foil includes masking the whole surface of a first metal foil in a laminate having the first metal foil, a first insulating resin layer having a thickness of 1 to 200 μm and a second metal foil laminated in this order, and patterning the second metal foil.

A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

The present disclosure relates to a multilayer circuit board manufacturing apparatus. The present disclosure includes: uncoiler configured to provide a member; a process unit configured to perform a process on the member provided from the uncoiler; a recoiler configured to wind the member on which the process is completed in the process unit; and a tension adjustment unit which is located in at least one of the uncoiler, the recoiler, a region between the uncoiler and the process unit, and a region between the process unit and the recoiler, and adjusts tension of the member.

A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor package. In one embodiment, a glass or silicon substrate is structured by micro-blasting or laser ablation to form structures for formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor package with embedded dies therein.

The present disclosure relates to methods and apparatus for forming thin-form-factor reconstituted substrates and semiconductor device packages for radio frequency applications. The substrate and package structures described herein may be utilized in high-density 2D and 3D integrated devices for 4G, 5G, 6G, and other wireless network systems. In one embodiment, a silicon substrate is structured by laser ablation to include cavities for placement of semiconductor dies and vias for deposition of conductive interconnections. Additionally, one or more cavities are structured to be filled or occupied with a flowable dielectric material. Integration of one or more radio frequency components adjacent the dielectric-filled cavities enables improved performance of the radio frequency elements with reduced signal loss caused by the silicon substrate.