A package structure includes a metal layer, a composite layer of a non-conductor inorganic material and an organic material, a sealant, a chip, a circuit layer structure, and an insulating protective layer. The composite layer of the non-conductor inorganic material and the organic material is disposed on the metal layer. The sealant is bonded on the composite layer of the non-conductor inorganic material and the organic material. The chip is embedded in the sealant, and the chip has electrode pads. The circuit layer structure is formed on the sealant and the chip. The circuit layer structure includes at least one dielectric layer and at least one circuit layer. The dielectric layer has conductive blind holes. The insulating protective layer is formed on the circuit layer structure. The insulating protective layer has openings, so as to expose parts of the surface of the circuit layer structure in the openings.

A circuit board includes a first circuit board portion and a second circuit board portion. The first circuit board portion is provided with a first transmission line for a low-frequency signal or a low-speed signal, and the second circuit board portion is provided with a second transmission line for a high-frequency signal or a high-speed signal. The second circuit board portion is located on the first circuit board portion in a positional relationship in which the first transmission line and the second transmission line are side-by-side with each other. With this structure, signal leakage and interference between different signals are reduced or prevented in a line that transmits signals with different frequencies and different transmission speeds.

A semiconductor device package includes a lower-density substrate and a higher-density substrate. The higher-density substrate is attached to the lower-density substrate. The higher-density substrate has a first interconnection layer and a second interconnection layer disposed over the first interconnection layer. A thickness of the first interconnection layer is different from a thickness of the second interconnection layer.

An electronics package is disclosed. The electronics package includes a first radio frequency (RF) substrate layer, a second RF substrate layer, and a plurality of conductive layers disposed adjacent to at least one of the first RF substrate layer and the second RF substrate layer and including an inner conductive layer disposed between and adjacent to both the first RF substrate layer and the second RF substrate layer. The inner conductive layer bonds the first RF substrate layer to the second RF substrate layer. The electronics package also includes a plurality of conductive interconnects extending through the first RF substrate layer and the second RF substrate layer and electrically coupled between at least two of the plurality of conductive layers.

Package to printed circuit board (PCB) transitions are described. In one aspect, a multi-layer PCB includes an external layer having a transition region configured to receive an electrical component and a clear routing region outside of the transition region. The PCB includes first via(s) that extend from the transition region to an inner trace routing layer. The trace routing layer is disposed between the external layer and the second inner trace routing layer. The first inner trace routing layer includes a transition area disposed under the transition region of the external layer, a clear routing area outside of the transition region, and a transmission line that connects a given first via to a second via for a second electrical component. The transmission line includes conductive trace(s) that each have a first width in the transition area and a second width, greater than the first width, in the clear routing area.

A circuit module includes a first wiring substrate having a first main surface and a plurality of first components mounted on the first main surface. The plurality of first components includes a multilayer component formed as a single chip by being sealed using resin members. The multilayer component includes a second wiring substrate having a second main surface and a third main surface that face each other, a second component mounted on the second main surface, and a third component mounted on the third main surface.

A multilayer board includes a layered body including insulating base material layers that are laminated, and first and second signal lines, a first ground conductor including a first opening, a second ground conductor, a third ground conductor, and an interlayer connecting conductor. The first signal line overlaps the first opening when seen in a layering direction. The second signal line is provided on a layer different from a layer including the first signal line and includes a portion extending side by side with the first signal line when seen in the Z-axis direction. The first, second, and third ground conductors are connected by the interlayer connecting conductor. The third ground conductor is disposed on a layer including the first signal line or a layer positioned between the first signal line and the second signal line.

A lamination circuit board structure lamination circuit board structure includes a printed circuit board substrate including conductive wiring traces on at least a first wiring face, a prepreg layer formed over the first wiring face, and a patch having an area smaller than 1,000 mm.sup.2. The patch includes conductive wiring traces formed on a wiring face and is laminated to the printed circuit board substrate over the prepreg layer, oriented with the wiring face in contact with and pressed into the prepreg layer. Portions of the prepreg layer fill interstices between the conductive wiring traces

Package to printed circuit board (PCB) transitions are described. In one aspect, a multi-layer PCB includes an external layer having a transition region configured to receive an electrical component and a clear routing region outside of the transition region. The PCB includes first via(s) that extend from the transition region to an inner trace routing layer. The trace routing layer is disposed between the external layer and the second inner trace routing layer. The first inner trace routing layer includes a transition area disposed under the transition region of the external layer, a clear routing area outside of the transition region, and a transmission line that connects a given first via to a second via for a second electrical component. The transmission line includes conductive trace(s) that each have a first width in the transition area and a second width, greater than the first width, in the clear routing area.

A printed circuit board is disclosed. The printed circuit board includes a first substrate portion, and a second substrate portion connected to the first substrate portion and having a flexible insulation layer which is bendable, and the second substrate portion includes a frame member inserted into the flexible insulation layer.