A chip-on-film (COF) package includes a film, a driver integrated circuit (IC) chip disposed on the film, an electrode pad disposed on an edge of the film, and a first deformation-preventing member disposed on the film, between the driver IC chip and the electrode pad.

Buffer structures are provided that can be used to reduce a strain in a conformable electronic system that includes compliant components in electrical communication with more rigid device components. The buffer structures are disposed on, or at least partially embedded in, the conformable electronic system such that the buffer structures overlap with at least a portion of a junction region between a compliant component and a more rigid device component. The buffer structure can have a higher value of Young's modulus than an encapsulant of the conformable electronic system.

A device for manufacturing a stretchable substrate structure according to an embodiment includes a carrier substrate receiving portion configured to receive a carrier substrate therein, a stretchable substrate receiving portion configured to receive a stretchable substrate in a direction facing the carrier substrate, and a diaphragm configured to be deformed by air pressure provided on one surface, wherein the diaphragm comes in contact with an entire surface of the stretchable substrate in a plane direction when deformed, such that the stretchable substrate is combined to the carrier substrate by deforming according to the deformed shape of the diaphragm.

A method of manufacturing a circuit board having waveguides including forming a waveguiding structure by injection molding. The waveguiding structure includes a plurality of waveguides arranged at intervals and at least one connecting portion connecting two adjacent waveguides. Each waveguide includes a waveguiding substrate and at least one protrusion on the waveguiding substrate. The connecting portion is removed to obtain at least two waveguides. A metal layer is formed to wrap the whole outer surface of each waveguide. A plurality of receiving grooves is formed to penetrate a wiring board. Each waveguide wrapped by the metal layer is embedded in one of the receiving grooves. The waveguides and the wiring board are fixed. A portion of the metal layer on a surface of each protrusion facing away from the waveguiding substrate is removed. A circuit board is also provided.

A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described. Further, a method of manufacturing a circuit board structure comprising two asymmetric circuit boards and a method of manufacturing two processed asymmetric circuit boards from a larger circuit board structure is described.

A circuit board and a method of manufacturing a circuit board or two circuit boards are illustrated and described. The circuit board includes (a) a dielectric layer with a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto and a layer thickness along a z-direction which is perpendicular with respect to the x-axis and to the y-axis; (b) a metallic layer which is attached to the dielectric layer in a planar manner; and (c) a component which is embedded in the dielectric layer and/or in a dielectric core-layer of the circuit board. The dielectric layer includes a dielectric material which has (i) an elastic modulus E in a range between 1 and 20 GPa and (ii) a coefficient of thermal expansion in a range between 0 and 17 ppm/K along the x-axis and along the y-axis.

A component built-in board comprises a multi-layer structure comprising a plurality of unit boards stacked therein a plurality of electronic components built in thereto in a stacking direction. The plurality of unit boards include: a first board having a first insulating layer and comprising an opening in which the electronic component is housed; and an intermediate board adjacent to the first board and comprising a first adhesive layer provided on at least a side of the first board of a second insulating layer. The intermediate board includes a first wiring layer formed at a position overlapping in the stacking direction a gap between an inner periphery of the opening and an outer periphery of the electronic component of the first board on a surface on the first board side of the second insulating layer.

A substrate that includes a first dielectric layer and a capacitor embedded in the first dielectric layer. The capacitor includes a first terminal, a second terminal, and a third terminal. The second terminal is laterally located between the first terminal and the third terminal. The capacitor also includes a second dielectric layer, a first metal layer and a second metal layer. The first metal layer is coupled to the first and third terminals. The first metal layer, the first terminal, and the third terminal are configured to provide a first electrical path for a first signal. The second metal layer is coupled to the second terminal. The second metal layer and the second terminal are configured to provide a second electrical path for a second signal.

A wiring board includes electronic components, a multilayer core substrate including insulating layers and conductive layers such that the insulating layers include a central insulating layer in the center position of the core in the thickness direction, a first build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core, and a second build-up layer including an insulating layer and a conductive layer such that the insulating layer has resin composition different from that of the insulating layers in the core. The core has cavities accommodating the electronic components, respectively, and including a first cavity and a second cavity such that the first and second cavities have different lengths in the thickness direction and are penetrating through the central layer at centers of the first and second cavities in the thickness direction.

A build-up process for fabricating a multi-layer PCB is provided during which a mezzanine redistribution, or routing, structure is formed within one of the PCB dielectric material layers that allows additional electrical interconnections (i.e., traces and crossovers) to be made within that layer, thereby obviating the need to add an additional PCB layer in order to make those interconnections. The mezzanine redistribution structure also can be interconnected with the metal layers that are above and below it to further increase routing complexity and flexibility. The mezzanine redistribution structure can be formed without increasing the total thickness of the PCB and without substantially increasing costs.