Patent classifications
H05K2201/0323
ELECTRONIC ELEMENT MOUNTING SUBSTRATE AND ELECTRONIC DEVICE
An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.
Transparent conductive film
A transparent conductive film (10) that has a substrate (14) having a surface (14a, 14b), a nanowire layer (12, 12a) over one or more portions of the surface (14a, 14b) of the substrate (14), and a conductive layer (16, 16a) on the portions comprising the nanowire layer (12, 12a), the conductive layer (16, 16a) comprising carbon nanotubes (CNT) and a binder.
Component carrier having a three dimensionally printed wiring structure
A component carrier and a method for manufacturing a component carrier is described wherein the component carrier includes a carrier body with a plurality of electrically conductive layer structures and/or electrically insulating layer structures and a wiring structure on and/or in the layer structures where the wiring structure is at least partially formed as a three-dimensionally printed structure.
Electronic element mounting substrate and electronic device
An electronic element mounting substrate includes a first substrate that has a first main surface, has a rectangular shape, and has a mounting portion for an electronic element on the first main surface, and a second substrate that is located on a second main surface opposite to the first main surface, is made of a carbon material, has a rectangular shape, has a third main surface facing the second main surface and a fourth main surface opposite to the third main surface, in which the third main surface or the fourth main surface has heat conduction in a longitudinal direction greater than heat conduction in a direction perpendicular to the longitudinal direction, and that has a recessed portion on the fourth main surface.
Resin composition, and prepreg, metal-clad laminate, and printed circuit board using the same
A resin composition is provided. The resin composition comprises the following constituents: (A) epoxy resin; (B) a compound of formula (I), ##STR00001## in formula (I), R.sub.1 and R.sub.2 are independently —H, —CH.sub.3, or —C(CH.sub.3); and (C) an optional filler.
Resin member and method for producing resin member
A resin member is formed from a resin material containing filler and an insulating base polymer as a main component. The resin member includes an alignment layer close to a surface of the resin member. The alignment layer includes the filler aligned in the surface direction and the base polymer filling the space between pieces of the filler. The alignment layer includes a carbonized portion that is carbonized matter of the base polymer, contains graphite, and provides electrical conductivity and thermal conductivity.
DIRECT-INK-WRITING METHOD FOR PRINTING STRAIN GAUGE ARRAY CIRCUIT BASED ON INSULATING STRIPS
In a direct-ink-writing (DIW) method for printing a strain gauge array circuit, several insulating strips are printed on the upper layer of the first circuit layer after the first circuit layer has been printed and cured, and the second circuit layer is then printed at the insulating strips. The functional layer of a strain gauge is printed and covered thereon without contacting the insulating strips; the head and tail electrodes of the functional layer are respectively connected to two layers of circuit layers; and finally, a layer of insulating material is printed for encapsulation. DIW is used to complete the whole printing. A new insulating method is used in a cross part of two silver lines of a row-column compound circuit. The local glue dispensing is changed to printing the insulating strips in routing regions, and ensures the strain transmission efficiency from the strain gauge substrate to the functional layer.
Electrically conductive PTC screen printable ink composition with low inrush current and high NTC onset temperature
An electrically conductive screen-printable PTC ink composition with low inrush current and high NTC onset temperature, consisting of at least two different polymers, polymer-1 and polymer-2; wherein the melting temperature difference between polymer-1 and polymer-2 must be greater than 50° C., and the mechanical strength of polymer-1 as expressed by Young's modulus must be greater than 200 MPa.
INTEGRATING GRAPHENE INTO THE SKIN DEPTH REGION OF HIGH SPEED COMMUNICATIONS SIGNALS FOR A PRINTED CIRCUIT BOARD
A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal applied to the conductive signal transmission structure has a signal speed of at least 112 Gbps.
CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF
A circuit board structure, including a circuit layer, a first dielectric layer, a first graphene layer, a first conductive via, and a first built-up circuit layer, is provided. The circuit layer includes multiple pads. The first dielectric layer is disposed on the circuit layer and has a first opening. The first opening exposes the pads. The first graphene layer is conformally disposed on the first dielectric layer and in the first opening, and has a first conductive seed layer region and a first non-conductive seed layer region. The first conductive via is disposed in the first opening. The first built-up circuit layer is disposed corresponding to the first conductive seed layer region. The first built-up circuit layer exposes the first non-conductive seed layer region and is electrically connected to the pads through the first conductive via and the first conductive seed layer region.