A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.

A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.

An electronic element mounting substrate includes: a first substrate including a first principal face; a second substrate located inside the first substrate in a plan view of the electronic element mounting substrate, the second substrate being made of a carbon material; a third substrate located between the first substrate and the second substrate in the plan view, the third substrate being made of a carbon material; and a first mounting portion for mounting a first electronic element, the first mounting portion being located on the first principal face side in a thickness direction of the substrate. The second substrate and the third substrate each have a low heat conduction direction and a high heat conduction direction. The second substrate and the third substrate is arranged so that the low heat conduction directions thereof are perpendicular to each other, and the high heat conduction directions thereof are perpendicular to each other.

A layered device having two base films, a conductive pattern attached to the first base film facing the second base film and a bonding layer binding the first base film and the second base film together. The bonding layer includes an opening, and the conductive pattern having an exposed portion aligned with the opening in the bonding layer. Further disclosed is a spacer attached to the first base film and the exposed portion of the conductive pattern, wherein the spacer fills at least part of the space created by the opening in the bonding layer. Also disclosed is a method of producing a layered device.

A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The circuit board includes a heat dissipation substrate, an insulating layer on the heat dissipation substrate, an electronic component, a base layer on the insulating layer, and a circuit layer on the base layer. The heat dissipation substrate includes a phase change structure and a heat conductive layer wrapping the phase change structure. The heat dissipation substrate defines a first through hole. The insulating layer defines a groove for receiving the electronic component. A second through hole is defined in the circuit layer, the base layer, and the insulating layer. A bottom of the second through hole corresponds to the heat conductive layer. A heat conductive portion is disposed in the second through hole.

Processes for localized lasering of a lamination stack and graphene-coated printed circuit board (PCB) are disclosed. An example PCB may include a lamination stack, post-lamination, that may further include a core, an adhesive layer, and at least one graphene-metal structure. A top layer of graphene of the graphene-metal structure may have never been grown before the lamination process or may have been removed post-lamination such that a portion of the top layer of graphene is missing. The localized lasering process described herein may grow (for the first time) or re-grow the graphene layer of the exposed portion of the metal layer without adverse effects to the rest of the lamination stack or PCB and while promoting a uniform layer of graphene on the top surface. A process of growing graphene through application of molecular layer and a self-assembled monolayer (SAM), are also described herein.

Processes for laminating a graphene-coated printed circuit board (PCB) are disclosed. An example laminated PCB may include a lamination stack that may include an inner core, an adhesive layer, and at least one graphene-metal structure. Pressure and heat—which may be applied under vacuum or controlled gas atmosphere—may be applied to the lamination stack, after all materials have been placed. The graphene of the graphene-metal structure is designed to promote high frequency performance and heat management within the PCB.

A wiring sheet includes one or more carbon wires each of which is one of a signal line and a power supply line, and which are conductors including carbon as a main material and have flexibility; and an insulation sheet that encloses substantially an entirety of the one or more carbon wires, includes an electrical insulator as a main material, and has flexibility.

In a stretchable wiring member having a relatively hard portion, such as a contact point, there is provided a solution to malfunction of the stretchable wiring member caused by stress generated at a boundary between the hard portion and a flexible portion. A stretchable wiring member includes a flexible substrate having stretchability, a stretchable wiring line disposed along the flexible substrate and configured to be stretched in association with stretching deformation of the flexible substrate, and a hard member that is harder than the flexible substrate. The flexible substrate has an extension layer portion interposed between the hard member and the stretchable wiring line.

Water-based nanoparticle inks may be formulated to be compatible with printed electronic direct-write methods. The water-based nanoparticle inks may include a functional material (nanoparticle) in combination with an appropriate solvent system. A method may include dispersing nanoparticles in a solvent and printing a circuit in an aerosol jet process or plasma jet process.