A method of connecting an electronic component on a mounting substrate where the electronic component is arranged with a first surface of the electronic component facing the mounting substrate and an opposite surface of the electronic component is facing away from the mounting substrate. A first component-side conductor on the second surface of the electronic component is electrically connected to a first substrate-side conductor on the mounting substrate by an electrically-conductive adhesive.

An electronic device including: a discrete transistor including a semiconductor chip encapsulated in a package made of an insulating material leaving access to a first pad of connection to a first conduction terminal of the transistor; and a printed circuit board (320) including first (125) and second (129) separate connection pads, wherein the transistor is assembled on the printed circuit board so that the first connection pad (105) of the transistor is in contact with the first (125) and second (129) connection pads of the printed circuit board.

An electrical connector element, for use on a printed circuit board assembly, includes a soldering pad having a longitudinal length and a cross-sectional width. The soldering pad is configured to be electrically-coupleable to a PCB device conductor. At least one impedance inducing feature is positioned along the longitudinal length of the soldering pad.

A highly efficient, multi-layered, single component sided circuit board layout design providing reduced parasitic inductance for power switched circuits. Mounted on the top board are one or more transistor switches, one or more loads, and one or more capacitors. The switches and capacitors form a loop with very low parasitic inductance. The loads may be a part of the loop, i.e. in series with the switches and capacitors, or may be connected to two or more nodes of the loop to form additional loops with common vertices. Parallel wide conductors carry the switch load current resulting in a low inductance path for the power loop. The power loop and gate loop current travel in opposite directions and are well separated, minimizing common source inductance (CSI) and maximizing switching speed.

A system and method for integrating a magnetic component within a power converter includes a coil integrated on a PCB. The PCB includes multiple layers and traces on each layer to form a single coil or to form multiple coils on the magnetic component. The PCB further includes at least one opening in the PCB through which a core component may pass, such that the magnetic component is defined by the coils and the core material. To reduce eddy currents built up within the traces, the dimensions of traces on a layer are varied and the position of traces between layers of the PCB are varied. The widths and locations of individual traces are selected to reduce coupling of the trace to leakage fluxes within the magnetic component. A floating conductive layer may also be provided to still further reduce the magnitude of eddy currents induced within the coil.

An electronic apparatus which achieves ease of incorporating flexible boards into the electronic apparatus and ease of impedance control at the same time. A first flexible board and a second flexible board are placed along a structure having a bent portion and a flat portion. Differential signal wires are wired on one surface of the first flexible board placed between the structure and the second flexible board, and first ground wires for impedance control of the differential signal wires are wired on the other surface and on a rear side of the differential signal wires. Second ground wires for impedance control of the differential signal wires are wired on one surface of the second flexible board the one surface of the first flexible board faces. A wiring density of the first and second ground wires differs between an area along the bent portion and an area along the flat portion.

Disclosed is a device for measuring the intensity of a current, suitable for measuring the intensity of a current flowing through a supply capacitor of an electronic control unit of a motor vehicle. The device includes at least one printed circuit, the printed circuit including at least one conductive layer and at least one first set of tracks printed on the at least one conductive layer, the first set of tracks including at least one first part having a first inductance and at least one second part having a second inductance, the first part and the second part being arranged so that the total inductance of the device is lower than each of the first inductance and the second inductance.

The disclosure relates to an electronic device including a circuit board; a housing; and an antenna, wherein the antenna and the circuit board are fixed inside the housing, wherein the circuit board comprises a first electrostatic protection circuit and a protected circuit, wherein the antenna is electrically connected to a first end of the first electrostatic protection circuit, and electrically connected to a first end of the protected circuit, wherein a second end of the first electrostatic protection circuit is electrically connected to a first ground point, a second end of the protected circuit is electrically connected to a second ground point, and the first electrostatic protection circuit is connected in parallel with the protected circuit, and wherein a trace distance between the second end of the first electrostatic protection circuit and the second end of the protected circuit is less than a first threshold, to reduce parasitic inductance.

The electronic circuit device includes: a first wiring pattern which is formed on a first main surface of a circuit board, has circuit elements including a switching element and mounted along a predetermined direction, and includes a virtual shortest current path connecting the circuit elements to each other along the predetermined direction; a second wiring pattern which is formed on a second main surface, and includes an opposing current path that opposes an area where the virtual shortest current path is formed; vias electrically connecting the first and second wiring patterns; and vias for heat transfer, connecting a mount area for the switching elements on the first main surface with an area on a side of the opposing current path on the second main surface. The heat dissipation member is in contact with the second main surface.

A wideband termination circuit layout is provided for high power applications. The circuit layout may include a dielectric layer having a first surface and a second surface. The circuit layout may also include an input port disposed over the first surface. The circuit layout may further include at least two resistive film patches disposed over the first surface of the dielectric layer and a tuning line between the at least two resistive films disposed over the first surface of the dielectric layer. The at least two resistive film patches are connected in series with the at least one tuning line.