H05K2201/09372

SEMICONDUCTOR PACKAGE
20250183186 · 2025-06-05 ·

A semiconductor package includes a package substrate including a first voltage substrate wire, an interposer substrate provided on the package substrate and including a first voltage interposer wire, a first semiconductor chip mounted on a top surface of the interposer substrate, and a voltage control chip provided on the top surface of the interposer substrate and laterally spaced apart from the first semiconductor chip, wherein the first semiconductor chip is electrically connected to the voltage control chip through the first voltage substrate wire, and wherein the first semiconductor chip is electrically connected to the voltage control chip through the first voltage interposer wire.

Electronic device

An electronic device comprises chip components aligned along a predetermined first direction and including respective terminal electrodes, and a metal block including an electrode-opposing surface and a mounting surface. The electrode-opposing surface is opposed and connected to the respective terminal electrodes of the chip components continuously along the first direction. The mounting surface is substantially perpendicular to the electrode-opposing surface and is substantially parallel to the first direction to oppose a land pattern when the electronic device is mounted on the land pattern.

Electronic control device
12453011 · 2025-10-21 · ·

An object of the present invention is to provide an electronic control device capable of improving the connection life and reliability of solder connecting a printed circuit board and a QFN type semiconductor package. For this purpose, a printed circuit board 106 includes a first land 109 connected to a first metal terminal 104 via a solder 107, a second land 110 connected to a second metal terminal 105 via a solder 108, a third land 112 disposed on the outer peripheral side of a semiconductor package 101 with respect to the first land 109, and a resist 113 formed on the third land 112 so as to be in contact with the lower surface of a molding resin 103.

Light emitting device and keyboard structure

A light emitting device and a keyboard structure are provided. The light emitting device includes a circuit board and multiple light emitting units. The circuit board includes a substrate, a first conductive pad, multiple second conductive pads, and multiple third conductive pads. The first conductive pad and the second conductive pads are disposed on a first board surface of the substrate. The first conductive pad has a symmetrical shape and a symmetrical axis. The symmetrical axis passes through the second conductive pads. The third conductive pads are disposed on a second board surface of the substrate. Each of the third conductive pads is electrically coupled to the first conductive pad and the second conductive pads by multiple conductive columns. Each of the light emitting units is connected to the first conductive pad and one of the second conductive pads.

CHIP ON LEAD DEVICE AND MANUFACTURING METHOD
20260040959 · 2026-02-05 ·

An electronic device includes a non-conductive die attach film on a side of a conductive lead, a semiconductor die having a first side and a lateral side, the first side on the non-conductive die attach film, and the lateral side including striations, and a package structure enclosing the semiconductor die and a portion of the conductive lead. A method includes singulating portions of a non-conductive die attach film on a carrier, attaching a backside of a wafer to the singulated portions of the non-conductive die attach film, and singulating semiconductor dies of the wafer while the backside of the wafer is attached to the singulated portions of the non-conductive die attach film.

PRINTED CIRCUIT BOARD

A printed circuit board includes a first insulating layer having first and second surfaces opposing each other in a thickness direction, and a second insulating layer disposed on one side of the first surface. A conductive via extends through the first insulating layer between the first and second surfaces. An inner conductor layer is disposed between an inner wall of the through-hole and the conductive via. A first pad is disposed on the first surface of the first insulating layer, farther from the insulating layer than the second insulating layer, and includes a first conductor layer and a second conductor layer on the first conductor layer. A second pad is disposed on the second surface of the first insulating layer and includes a third conductor layer and a fourth conductor layer. The inner conductor layer forms an interface with, and is in contact with, the first conductor layer.