A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.

A method of forming an electronic device is described which comprises a stack of electronic components wherein each electronic component comprises a face and external terminations. A component stability structure is attached to at least one face. A circuit board is provided wherein the circuit board comprises circuit traces arranged for electrical engagement with the external terminations. The component stability structure mechanically engages with the circuit board and inhibits the electronic device from moving relative to the circuit board.

A printed circuit board according to various embodiments of the disclosure includes a plurality of layers in which at least one opening is formed and at least one antenna included in at least one layer among the plurality of layers, and the at least one opening is located within a specified distance from the at least one antenna and is formed through at least one of the plurality of layers.

A semi-flexible component carrier includes a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure The layer structures are stacked on top of each other in a stacking direction s. A recess extends from a first main surface of the stack into the stack and extends only partially into one of the at least one electrically insulating layer structure so that an electrically insulating layer structure having a stepped portion is formed. The stepped portion provides a flexible region of the stack with respect to a rigid region of the stack.

A first resin layer (1) has: a covered region which is covered by a second resin layer (2) and an exposed region (1a); a contact part (1b) which is provided in the exposed region (1a); and a bend part (1c) which is provided between (a) a boundary between the covered region and the exposed region (1a) and (b) the contact part (1b).

A flexible light emitting diode (LED) circuit having a first layer, the first layer including a conductive material configured to connect to an LED die, a second layer, the second layer including an electrically insulating material, and a third layer positioned between the first and second layer, the third layer having a first terminal extended electrically connecting tab that extends outward beyond the first layer and the second layer.

An electrical break is created in a via that would ordinarily electrically connect different layers of a printed circuit board. The electrical break severs the via into two or more separate and electrically disconnected vias. The electrical break may be placed at any depth along the via, thus demarking different purposes associated with different layers.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; first and second signal vias forming a differential signal pair, the first and second signal vias extending through the attachment layers and connecting to respective signal traces on a breakout layer of the routing layers; an antipad of a first type around and between the first and second signal vias in one or more of the attachment layers; and antipads of a second type around the first and second signal vias in at least one routing layer adjacent to the breakout layer.

A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are substantially arranged in a row and spaced apart from one another. The conductive through via extends through the dam portions.

A conductive bump assembly may include a passive substrate. The conductive bump assembly may also include a conductive bump pad supported by the passive substrate and surrounded by a first passivation layer opening. The conductive bump assembly may further include a second passivation layer opening on the passive substrate. The second passivation layer opening may be merged with the first passivation layer opening surrounding the conductive bump pad proximate an edge of the passive substrate. The conductive bump assembly may also include a conductive bump on the conductive bump pad.