A glass wiring substrate includes a glass substrate, a first wiring portion being formed on a first surface of the glass substrate, a second wiring portion being formed on a second surface opposite to the first surface, a through-hole formed in a region of the glass substrate in which the first wiring portion and the second wiring portion are not formed, the through-hole having a diameter on a second surface side larger than a diameter on a first surface side, and a through-hole portion formed in the through-hole, one end portion of the through-hole portion extending to the first wiring portion, the other end portion of the through-hole portion extending to the second wiring portion, in which a wiring pitch P.sub.1 of the first wiring portion in the vicinity of the through-hole portion is narrower than a wiring pitch P.sub.2 of the second wiring portion in the vicinity of the through-hole portion.

The present disclosure provides a semiconductor substrate, including a first dielectric layer with a first surface and a second surface, a first conductive via extending between the first surface and the second surface, a first patterned conductive layer on the first surface, and a second patterned conductive layer on the second surface. The first conductive via includes a bottom pattern on the first surface and a second patterned conductive layer on the second surface. The bottom pattern has at least two geometric centers corresponding to at least two geometric patterns, respectively, and a distance between one geometric center and an intersection of the two geometrical patterns is a geometric radius. A distance between the at least two geometric centers is greater than 1.4 times the geometric radius. A method for manufacturing the semiconductor substrate described herein and a semiconductor package structure having the semiconductor substrate are also provided.

Systems and methods are provided for reducing crosstalk between differential signals in a printed circuit board (PCB) using fine pitch vias. A pair of contact pads are on the top surface of the PCB and configured to couple a PCB component to the PCB, the contacts a first distance from each other. A first via of a plurality of vias is electrically coupled to a first contact of the pair of contacts and a second via is electrically coupled to a second contact, the first via and second via a second distance from each other, the second distance being less than current standards for minimum via pitch. Each via comprises a via pad on the top surface and a plated through-hole extending from the top surface to a termination point. A separator gap is between the first via and the second via.

An electronic device according to various embodiments may comprise: a housing; an antenna structure positioned in the housing; and a wireless communication circuit. The antenna structure may comprise: a first conductive layer comprising a first opening; a second conductive layer positioned in parallel with the first conductive layer, the second conductive layer comprising a second opening which at least partially overlaps with the first opening when the first conductive layer is seen from above; a third conductive layer positioned in parallel with the first conductive layer and interposed between the first conductive layer and the second conductive layer; a first insulating layer interposed between the first conductive layer and the third conductive layer; a second insulating layer interposed between the second conductive layer and the third conductive layer; a first conductive plate in the first opening, which is electrically separated from the first conductive layer; a second conductive plate in the second opening, which is electrically separated from the second conductive layer; a first conductive via electrically connected between the first conductive plate and the third conductive layer through the first insulating layer; and a second conductive via electrically connected between the second conductive plate and the third conductive layer through the second insulating layer. The wireless communication circuit may be configured to transmit or receive a signal having a frequency between 3 giga hertz (GHz) and 100 GHz and may be electrically connected to the antenna structure. Various embodiments may be possible.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

An electronic control unit has a substrate that includes a terminal connection portion that is a through hole that extends through the substrate from a first surface to a second surface. A resist opening along an outer edge of the terminal connection portion exposes a circuit pattern from a surface resist layer. A plurality of vias are disposed at positions adjacent to the resist opening in a heat receiving area to facilitate the transfer of heat during a soldering process from the first surface to the second surface.

A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

Circuits and methods include transmission lines formed from a conductive cladding on a substrate surface. The transmission line includes additional reference conductors positioned co-planar on the surface, including a gap between the transmission line and each of the reference conductors. The transmission line and the reference conductors are at least partially encapsulated (e.g., sandwiched) between two substrates. Isolation boundaries may be included as ground planes, e.g., above and below the transmission line, on opposing surfaces of the substrates, and Faraday walls, e.g., vertically, through the substrates. Current densities generated by various electromagnetic signals are distributed among the transmission line and the reference conductors (as a tri-conductor arrangement), and may be partially further distributed to the isolation (ground) boundaries.

To provide a wiring substrate, an electronic device, and an electronic module the size of which can be easily reduced and the strength of which can be maintained. A wiring substrate includes an insulation substrate and an electrical wiring structure. The insulation substrate includes a recess section in one surface. A frame portion of the insulation substrate that forms a side surface which connects an opened surface and a bottom surface of the recess section to each other includes a first conductive portion having a plate shape in the frame portion.