A method of manufacturing a circuit substrate including forming, in an insulating substrate and circuit patterns that are provided on a first surface and a second surface of the insulating substrate, a through-hole penetrating the insulating substrate and the circuit patterns, where the circuit patterns contain Cu as a main component. The method including filling, in the through-hole, an electrically conductive paste that is a melting-point shift electrically conductive paste including SnBi solder powder, Cu powder, and resin, and forming a protrusion obtained by causing the electrically conductive paste to protrude from the through-hole. The method further including performing pressure treatment on the protrusion near the through-hole; and performing heat treatment on the insulating substrate whose protrusion is subjected to the pressure treatment and causing the circuit patterns and the electrically conductive paste to be electrically connected with each other.

A multilayer ceramic substrate includes: a plurality of ceramic layers 300a, 300b stacked together; a via hole 400a, 400b provided in each of the plurality of ceramic layers, the via holes of the plurality of ceramic layers being connected together in a layer stacking direction of the plurality of ceramic layers; a via wire 406a, 406b including an electrical conductor filled into each of the via holes; a first conductor 404a, 404b provided on an upper surface of at least one of the plurality of ceramic layers, the first conductor having an annular or partially annular shape surrounding the via wire; and a second conductor 403a, 403b including a first portion and a second portion, the first portion being located outside the first conductor on the upper surface of the at least one ceramic layer, the second portion overlying the first conductor, and an inner rim of the second portion being located outside an inner rim of the first conductor, wherein a thickness of the first conductor 404a, 404b is greater than a thickness of the second conductor 403a, 403b.

A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

A wiring body includes: a first insulator; a conductor disposed on a first surface of the first insulator and that includes a terminal; and a second insulator disposed on the first surface to cover the conductor. The second insulator includes: an opening from which the terminal is exposed; and an end face that delimits the opening and that includes a first face, a second face that is farther away from the first insulator than the first face, and an edge that connects the first face and the second face.

A coupled via structure includes a plate via penetrating through an board body and having first and second plates spaced apart from each other by a first gap distance, a contact pad connected to the plate via on a surface of the board body and having first and second contacts connected to the first and second plates, respectively, and a connection line connected to the contact pad on the surface of the board body and having first and second lines connected to the first and second contacts, respectively, and spaced apart from the first line by a second gap distance. Accordingly, the deviation of the characteristic impedance is reduced (or, alternatively, minimized) between the coupled via structure and the coupled signal line.

The present disclosure relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.

A component-embedded resin substrate (1) includes a plurality of resin layers (2) made of a first resin and laminated on one another, and a component (3) arranged to be surrounded by each resin layer (2) in a first group (8) which is a group of two or more resin layers arranged successively in a thickness direction included in the plurality of resin layers (2). An auxiliary resin portion (9) made of a second resin different from the first resin is arranged to be in contact with and along at least one of surfaces of the component (3).

A method for soldering the soldering fastening element to a circuit board is introduced. The soldering fastening element is soldered to a first circuit board so as for a second board to be coupled thereto. The soldering fastening element includes a body soldered to the first circuit board, a head for fastening the second board in place, and a neck which connects the body and the head. When in use, the soldering fastening element is contained in a carrier, taken out of the carrier with an automated tool, transferred to the first circuit board, and heated through a solder layer on the first circuit board such that the body gets soldered to the first circuit board to form a module member. Therefore, the second board gets coupled to the first circuit board through the head and neck.