A PCB includes a plurality of layers spaced apart in a vertical direction, a first detection pattern and a second detection pattern and pads connected to the first detection pattern and the second detection pattern. The first detection pattern and the second detection pattern are provided in a respective one of a first layer and a second layer adjacent to each other such that the first detection pattern and the second detection pattern are opposed to each other. The pads are provided in an outmost layer. Each of the first detection pattern and the second detection includes at least one main segment extending in at least one of first and second horizontal directions and a diagonal direction. A time domain reflectometry connected to a pair of pads detects a misalignment of the PCB by measuring differential characteristic impedance of the first detection pattern and the second detection pattern.

Spacer self-aligned via structures for gate contact or trench contact are described. In an example, an integrated circuit structure includes a plurality of gate structures above a substrate. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. The integrated circuit structure also includes a plurality of dielectric spacers, a corresponding one of the plurality of dielectric spacers between adjacent ones of the plurality of gate structures and the plurality of conductive trench contact structures, wherein the plurality of dielectric spacers protrudes above the plurality of gate structures and above the plurality of conductive trench contact structures. A conductive structure is in direct contact with one of the plurality of gate structures or with one of the plurality of conductive trench contact structures.

A semiconductor storage device according to an embodiment includes a housing and a board, a controller, and a semiconductor memory component. The housing includes a first wall portion, a second wall portion, a third wall portion, and a fourth wall portion. The first wall portion and the second wall portion are separatable from each other. The third wall portion and the fourth wall portion are separatable from each other.

A storage drive, including: a main module, including: a main printed circuit board (PCB) having a first side positioned opposite to a second side; flash memory components positioned on the main PCB at a first end of the storage drive, a controller module positioned on the main PCB at a second end of the storage drive opposite to the first end; and a capacitor module, including: a module printed circuit board (PCB) having a first side positioned opposite to a second side; a plurality of capacitors positioned on the module PCB on the first side of the module PCB, wherein the capacitor module is coupled to the main module such that the capacitor module is positioned at the first end of the storage drive and the first side of the capacitor module faces the first side of the main module.

Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuitry is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.

A module, comprising: a printed circuit board (PCB); a power and management connector disposed on the PCB to connect to a computing device via a first cable; a data connector disposed on the PCB to connect to the computing device via a second cable; and a memory slot, to accept a memory device, disposed on the PCB and connected to the power and management connector and the data connector.

In an example, a device includes: a printed circuit board (PCB); at least one solid state drive (SSD) connected at a first side of the PCB via at least one SSD connector; at least one field programmable gate array (FPGA) mounted on the PCB at a second side of the PCB; and at least one connector attached to the PCB at a third side of the PCB, wherein the device is configured to operate in a first speed from a plurality of operating speeds based on a first input received via the at least one connector.

A connector includes mounting tabs that are extended relative to traditional mounting tabs. On a back side of the printed circuit board (PCB), the mounting tabs connect to a back plate. The mounting tabs extend through the PCB and connect with the back plate, which provides improved structural integrity. Depending on the connector, the use of the mounting tabs can use existing mounting holes for the connector and remove the need for additional mounting holes.

Semiconductor packages with pass-through clock traces and associated devices, systems, and methods are disclosed herein. In one embodiment, a semiconductor device includes a package substrate including a first surface having a plurality of substrate contacts, a first semiconductor die having a lower surface attached to the first surface of the package substrate, and a second semiconductor die stacked on top of the first semiconductor die. The first semiconductor die includes an upper surface including a first conductive contact, and the second semiconductor die includes a second conductive contact. A first electrical connector electrically couples a first one of the plurality of substrate contacts to the first and second conductive contacts, and a second electrical connector electrically couples a second one of the plurality of substrate contacts to the first and second conductive contacts.

A plug-in connector having terminal provided in terminal receiving cavities. The terminals have memory card engagement sections. A memory card receiving slot is provided in the housing. The memory card receiving slot spans the terminal receiving cavities. A portion of the memory card receiving slot is in alignment with each of the terminal receiving cavities. An elongated opening extends between the memory card receiving slot and the terminal receiving cavities. A memory card is positioned in the memory card receiving slot. The memory card stores data which is identifiable to the specific device and allows the data to be easily conveyed.