A light emitting device includes a light emitting element, a light-reflecting substrate, and an electrically conductive member. The light emitting element includes a first surface and an electrode provided on the first surface. The light-reflecting substrate has a first main surface facing the first surface of the light emitting element and has a second main surface opposite to the first main surface. The light-reflecting substrate defines a hole at a position corresponding to the electrode. The hole penetrates through the light-reflecting substrate from the first main surface to the second main surface. The electrically conductive member includes a substantially spherical core arranged in the hole and bonded with the electrode, and a coating portion provided in a space between the substantially spherical core and a lateral surface of the hole.

A security device in an electronic device which protects against unauthorized disassembly includes light sources, a plurality of photosensitive elements, a detection unit, a storage unit, a processor, and light guiding devices. Light conducting channels are provided between the light sources and the induction elements. Barrier objects that block light are installed at certain first light guiding channels of the light guiding channels, and are removed from the first light conducting channels when the electronic device is disassembled, so that induction signals output by the photosensitive elements are changed from the model or original digitally-recorded signals.

A ceramic electronic component includes an element body having a dielectric and internal electrodes, the element body having an upper surface, a lower surface, and side surfaces; external electrodes formed on multiple surfaces of the element body, and an oxide layer formed on the upper surface of the element body. Each of the external electrodes has a base layer and a plating layer, the base layer containing metal and having a lower part formed on the lower surface of the element body and a side part formed on one of the side surfaces of the element body and being connected to one or more of the internal electrodes, the plating layers being formed on the lower part of the corresponding base layer. The oxide layer has a surface roughness Ra that is equal to or greater than 0.20 micrometers.

A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.

A scalable, detachable interconnect system is provided that includes a shielded-frame structure having alignment features that forms a separable interconnect assembly which can be used to electrically couple at least two semiconductor devices. The interconnect system functions to protect, secure, and align electrical contacts on a first and a second semiconductor device coupled together. In this manner, the interconnect assembly realizes an electrical-mechanical interposer system that can securely connect semiconductor devices (e.g., printed circuit boards and semiconductor device packages) together while presenting electrical optimization features such as internal ground shielding and mechanical properties such as resilience, compliance, reusability, and reliable scrub motion to remove oxide from the pads or bumps.

An electronic sub-assembly, which may include: a ceramic substrate having a top surface and a bottom surface, a plurality of layers of ceramic material disposed between the top surface and the bottom surface of the substrate, and a plurality of conductive structures passing through the substrate between the top surface and the bottom surface of the substrate; and a ball grid array disposed on the bottom surface of the substrate, the ball grid array comprising a plurality of solder balls, wherein at least a portion of the solder balls are connected to at least a portion of the conductive structures.

A wiring substrate includes an insulating layer, a first wiring layer and a second wiring layer on opposite sides of the insulating layer, and a via piercing through the first wiring layer and the insulating layer to electrically connect to the second wiring layer. The via includes an end portion projecting from a first surface of the first wiring layer facing away from the insulating layer. A surface of the end portion facing in the same direction as the first surface of the first wiring layer is depressed to be deeper in the center than in the periphery.

Some embodiments include apparatus and methods using a package substrate and a die coupled to the package substrate. The package substrate includes conductive contacts, conductive paths coupled to the conductive contacts, and a resistor embedded in the package substrate. The die includes buffer circuits and a calibration module coupled to the buffer circuits and the resistor. The buffer circuits include output nodes coupled to the conductive contacts through the conductive paths. The calibration module is configured to perform a calibration operation to adjust resistances of the buffer circuits based on a value of a voltage at a terminal of the resistor during the calibration operation.

An apparatus including a bridge member and a clamp is disclosed. The bridge member is positioned in a first plane and has a substrate with a first surface and a second surface; and a plurality of distinct conductive pillars formed on the second surface of the substrate. The clamp has a body, a proximal end and a distal end. The body is positioned in a second plane above the first plane with the second plane being within 2 degrees of parallel to the first plane. The proximal end is positioned along the second plane; and the distal end has a plurality of prongs. The distal end is offset from the second plane in a direction toward the bridge member such that each prong contacts the first surface of the substrate.

A wiring substrate includes an insulating layer, a first wiring layer and a second wiring layer on opposite sides of the insulating layer, and a via piercing through the first wiring layer and the insulating layer to electrically connect to the second wiring layer. The via includes an end portion projecting from a first surface of the first wiring layer facing away from the insulating layer. A surface of the end portion facing in the same direction as the first surface of the first wiring layer is depressed to be deeper in the center than in the periphery.