Embodiments relate to placing light emitting diodes from a carrier substrate to a target substrate. At least one LED is embedded in a polymer layer on a substrate. The polymer layer is etched between the at least one LED and the substrate. A thickness of the polymer layer is monitored during etching of the polymer layer. The etching of the polymer layer is terminated responsive to determining that the thickness of the polymer layer is in a target range or a target value. A pick-up-tool (PUT) is brought into contact with at least one surface of the at least one LED facing away from the substrate responsive to dry-etching the polymer layer, and the PUT is lifted with the at least one LED attached to the PUT.

An extremely thin copper foil with a carrier is provided that can keep stable releasability even after being heated for a prolonged time at a high temperature of 350 C. or more. The extremely thin copper foil with a carrier includes a carrier composed of a glass or ceramic material; an intermediate layer provided on the carrier and composed of at least one metal selected from the group consisting of Cu, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, In, Sn, Zn, Ga, and Mo; a release layer provided on the intermediate layer and including a carbon sublayer and a metal oxide sublayer or containing metal oxide and carbon; and an extremely thin copper layer provided on the release layer.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

A method for producing a flexible device is described. The method includes providing a support substrate, coating the support substrate with an adhesive layer, providing a device having a microstructure on the adhesive layer, attaching a flexible substrate to the device, and removing the adhesive layer.

A circuit board including an interconnect substrate and a multilayer structure is provided. The interconnect substrate includes a core layer and a conductive structure disposed on the core layer. The multilayer structure is disposed on the conductive structure. The multilayer structure includes a plurality of dielectric layers and a plurality of circuit structures. The circuit structures are disposed in the dielectric layers. A topmost layer in the circuit structures is exposed to the dielectric layers to be in contact with the conductive structure. A pattern of the topmost layer in the circuit structures and a pattern of a top surface of the conductive structure are engaged with each other.

Provided is a technique that can achieve an insulating layer with small surface undulations and can suppress a haloing phenomenon in manufacturing a printed wiring board even when using a thin resin composition layer. Specifically, provided is a method for manufacturing a printed wiring board that includes the steps of: (A) preparing a resin sheet with an inorganic layer including (i) a support with an inorganic layer including an inorganic layer, a support in contact with the inorganic layer, and a release layer and (ii) a resin composition layer in contact with the release layer of the support with an inorganic layer; (B) laminating the resin sheet with an inorganic layer onto an internal layer substrate so that the resin composition layer of the resin sheet with an inorganic layer is in contact with the internal layer substrate; (C) curing the resin composition layer to form an insulating layer; and (D) perforating the insulating layer.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

An electronic device includes electronic components, a molded resin element wherein the electronic components are embedded and secured, and a heat transfer layer; the heat transfer layer has a higher thermal conductivity than the molded resin element. The heat transfer layer is in contact with portions of the electronic components other than an electrode pad and a terminal. This prevents increases in the cost of manufacturing the electronic device and the allows the electronic device to be thinner.

In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.

A method for selective metallization includes: selectively adsorbing catalytic nanoparticles onto an imprint mold to form a selectively adsorbed catalytic nanoparticle (SACN) mold; using the SACN mold in an imprinting process to synchronously transfer a pattern and the catalytic nanoparticles onto a film; separating the film from the SACN mold; and selectively depositing metal onto the film based on the pattern transferred to the film.