H05K2203/054

METHOD FOR PRODUCING ELECTROCONDUCTIVE LAMINATE, LAMINATE, AND ELECTROCONDUCTIVE LAMINATE

An object of the present invention is to provide a method for producing an electroconductive laminate, which is capable of forming a metal layer having low resistance at a position corresponding to a patterned plated layer, a laminate, and an electroconductive laminate. The method for producing an electroconductive laminate of the present invention includes: a step of forming a plated layer forming layer on a base material using a predetermined plated layer forming composition; a step of subjecting the plated layer forming layer to a patternwise exposure treatment and a development treatment to form a patterned plated layer containing a portion having a line width of less than 3 m; a step of applying a plating catalyst or a precursor thereof to the patterned plated layer using an alkaline plating catalyst-applying liquid containing the plating catalyst or the precursor thereof; and a step of subjecting the patterned plated layer to which the plating catalyst or the precursor thereof has been applied to a plating treatment using a plating liquid containing aminocarboxylic acids to form a metal layer on the patterned plated layer.

FABRICATION METHOD OF CIRCUIT BOARD

A fabrication method of a circuit includes drilling holes in a substrate, so as to form a plurality of first opening holes and second opening holes in the substrate. A cover film is attached onto the substrate, so as to cover the first opening holes and the second opening holes. A portion of the cover film covering the first opening holes is removed, so as to expose the first opening holes. The first opening holes are filled.

LANDLESS MULTILAYER CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
20180332706 · 2018-11-15 ·

A landless multilayer circuit board includes a first substrate, a first circuit, at least one connecting pillar, a second substrate, and a second circuit. The second substrate is on the surface of the first substrate, covering the first circuit, and exposing at least one top of the at least one connecting pillar exposed out of a surface of the second substrate, wherein an area of a portion of the at least one connecting pillar that is exposed out of the surface of the second substrate is greater than an area of a portion of the at least one connecting pillar that is connected to the first circuit. The second circuit is on the surface of the second substrate and the at least one connecting pillar, and connected to the portion of the at least one connecting pillar that is exposed out of the surface of the second substrate.

Manufacturing method of landless multilayer circuit board

Provided is a landless multilayer circuit board and a manufacturing method thereof. The manufacturing method includes steps of forming a first circuit on a first substrate, patterning a photoresist layer to form at least one via between the first circuit and a second circuit, forming at least one connecting pillar in the at least one via, removing the photoresist layer, forming a second substrate to cover the at least one connect pillar, and forming the second circuit on the second substrate. The second circuit is connected to the first circuit through the at least one connecting pillar. When the second circuit is formed, the at least one via does not need to be filled, thereby making the second circuit flat.

Printed circuit board and method for manufacturing same

A printed circuit board according the present embodiment includes an insulating layer; at least one circuit pattern or pad formed on the insulating layer; a solder resist having an opening section exposing the upper surface of the pad and formed on the insulating layer and a bump formed on the pad exposed through the opening section of the solder resist and having a lower area narrower than the upper area.

Printed wiring board, method for manufacturing printed wiring board and package-on-package
09693458 · 2017-06-27 · ·

A method for manufacturing a printed wiring board includes forming a resin layer on an interlayer layer such that the resin layer has first openings exposing circuits in central portion and second openings exposing circuits in peripheral portion of the interlayer layer, forming solder bumps on the circuits in the first openings, forming a plating resist over the bumps and resin layer such that the resist has openings having diameters greater than the second openings and exposing the second openings, forming a seed layer on the resist, in the openings and on the circuits through the second openings, applying electrolytic plating on the resist such that electrolytic plating fills the openings and forms a plated film on the resist and metal posts in the openings, etching the plating such that the plated film is removed and recesses are formed on end surfaces of the posts, and removing the resist.