A method of forming a circuit board includes forming a conductive pattern on a substrate; forming a first negative resist on the substrate after formation of the conductive pattern; partially exposing the first negative resist on the surface of the conductive pattern to form a first via exposure portion; forming a second negative resist on the substrate after formation of the first via exposure portion; partially exposing the second negative resist on the first via exposure portion to form a second via exposure portion larger than the first via exposure portion; developing the first negative resist and the second negative resist after formation of the second via exposure portion to form a via opening reaching the conductive pattern; and filling the via opening with a conductive material.

A printed circuit board according the present embodiment includes an insulating layer; at least one circuit pattern or pad formed on the insulating layer; a solder resist having an opening section exposing the upper surface of the pad and formed on the insulating layer and a bump formed on the pad exposed through the opening section of the solder resist and having a lower area narrower than the upper area.

A method of forming a circuit board includes forming a conductive pattern on a substrate; forming a first negative resist on the substrate after formation of the conductive pattern; partially exposing the first negative resist on the surface of the conductive pattern to form a first via exposure portion; forming a second negative resist on the substrate after formation of the first via exposure portion; partially exposing the second negative resist on the first via exposure portion to form a second via exposure portion larger than the first via exposure portion; developing the first negative resist and the second negative resist after formation of the second via exposure portion to form a via opening reaching the conductive pattern; and filling the via opening with a conductive material.

A production process for a solder electrode, including: a step (I) of forming an opening in a portion of a film provided on a substrate having an electrode pad, the portion corresponding to the electrode pad on the substrate, and thereby forming a resist from the film on the substrate, and a step (II) of filling the opening of the resist with molten solder, wherein the resist is composed of at least two layers each containing a resin as a constituent, and a layer (1) of the resist, the layer (1) being closest to the substrate, does not substantially contain a component that thermally crosslinks the resin contained as a constituent in the layer (1) and a component that undergoes thermal self-crosslinking.

A component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and a solder resist structure on at least one of two opposing main surfaces of the stack. The solder resist structure includes at least two different kinds of solder resist provided on one of said main surfaces.

A flexible chip on film includes a base insulating layer, a metal layer disposed on an upper surface of the base insulating layer and including a circuit pattern, an integrated circuit chip disposed on an upper surface of the metal layer and electrically connected to the metal layer, a solder resist layer disposed on the metal layer and insulated from the integrated circuit chip, and a reinforcing layer disposed on an upper surface of the solder resist layer. When the chip on film COF is bent, a neutral surface, in which a vector sum of a tensile force and a compressive force becomes substantially zero, is placed in the metal layer.

A method for manufacturing a printed wiring board includes forming a removable layer over first pads in central portion of an interlayer insulation layer to mount IC chip, forming on the interlayer and removable layers a resin insulation layer having openings exposing second pads in peripheral portion of the interlayer layer to connect second substrate, forming a seed layer on the resin layer, in the openings and on the second pads, forming on the seed layer a plating resist having resist openings exposing the openings of the resin layer with diameters greater than the openings, filling the resist openings with electrolytic plating such that metal posts are formed in the resist openings, removing the resist, removing the seed layer exposed on the resin layer, and removing the removable layer and the resin layer on the removable layer such that cavity exposing the first pads is formed in the resin layer.

A component carrier includes a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and a solder resist structure on at least one of two opposing main surfaces of the stack. The solder resist structure includes at least two different kinds of solder resist provided on one of said main surfaces.