A printed wiring board includes a conductor layer including a conductor circuit, a resin insulating layer formed on the conductor layer and having a via opening reaching to the conductor circuit of the conductor layer, and a via conductor formed in the via opening of the resin insulating layer such that the via conductor is connecting to the conductor circuit of the conductor layer. The conductor circuit of the conductor layer has a first conductor portion and a second conductor portion integrally formed such that the first conductor portion is connected to the via opening of the resin insulating layer, that the second conductor portion is surrounding the first conductor portion and that the first conductor portion has a thickness which is greater than a thickness of the second conductor portion.

To provide a wiring board ensuring adhesion strength of a connecting terminal to reduce the connecting terminal from being fallen over or peeled off under fabrication process. The wiring board according to the present invention includes a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body and a filling member filled up between the plurality of connecting terminals. The filling member is filled up to a position lower than a height of the plurality of connecting terminals. The connecting terminals has a cross section with a trapezoidal shape where a width of a first principal surface on a side contacting the laminated body is wider than a width of a second principal surface facing the first principal surface.

A method of manufacturing a wiring substrate according to the present invention includes a step of forming a wiring layer including connection terminals on a first insulating layer; a step of forming a second insulating layer on the wiring layer and on the first insulating layer; a step of forming electrically insulative dummy portions separated from the wiring layer on the first insulating layer through patterning of the second insulating layer; a step of forming a third insulating layer on the wiring layer, on the dummy portions, and on the first insulating layer; and a step of forming openings in the third insulating layer for exposing the connection terminals in such a manner that upper end portions of the connection terminals protrude from the third insulating layer, and lower end portions of the connection terminals are embedded in the third insulating layer.

A wiring board includes a base layer, a plurality of connection terminals and a surface layer. The base layer is electrically insulative. The plurality of connection terminals are conductive and formed on the base layer. The surface layer is electrically insulative, and fills gaps between the plurality of connection terminals on the base layer. The connection terminals include a base portion made of a conductive first metal and a coating portion made of a conductive second metal that is different from the first metal. The coating portion penetrates the surface layer, and coats the base portion to the base layer.

An electronic component includes: a substrate; wiring provided on the substrate, and including an uneven section at an edge portion of the wiring in plain view; and an insulating film provided on the substrate and on the wiring. And a method of manufacturing an electronic component includes: forming, on a substrate, wiring including an uneven section at an edge portion of the wiring in plain view; and forming an insulating film on the substrate and on the wiring.

To reduce radio frequency losses during operation of a radio frequency integrated circuit module, the radio frequency integrated circuit module is fabricated such that at least one of an edge of the wirebond pad on the copper trace and a sidewall of the copper trace is free from high-resistivity plating material. The unplated portion provides a path for the radio frequency current to flow around the high-resistivity material, which reduces the radio frequency signal loss associated with the high resistivity plating material.

A circuit board according to an embodiment includes an insulating layer; a first circuit pattern disposed on a first surface of the insulating layer; a first solder resist disposed on the first surface of the insulating layer; and a first barrier layer including a first-first portion disposed between the first solder resist and the first circuit pattern, and a first-second portion disposed between the insulating layer and the first circuit pattern; wherein the firs-first portion of the first barrier layer includes: a first-first gold (Au) layer disposed under a lower surface of the first circuit pattern; and a first-first palladium (Pd) layer disposed under a lower surface of the first-first gold (Au) layer; wherein the first-second portion of the first barrier layer includes: a first-second gold (Au) layer disposed to surround a side surface and an upper surface of the first circuit pattern; and a first-second palladium (Pd) layer disposed to surround the first-second gold (Au) layer; and wherein the first circuit pattern is not in contact with the first solder resist and the insulating layer by the first-first portion and the first-second portion of the first barrier layer.

A printed wiring board includes an uppermost insulating layer, first pads positioned to mount an IC chip on the insulating layer, second pads positioned to mount a second printed wiring board on the insulating layer, metal posts formed on the second pads, respectively, such that the metal posts mount the second board over the chip, and a solder resist layer formed on the uppermost insulating layer and having first and second openings such that the first openings exposes the first pads and that the second openings exposes the second pads, respectively. The metal posts are formed such that each of the metal posts has a diameter which is smaller than a diameter of each of the second opening portions, and the second opening portions are formed such that the diameter of each of the second opening portions is smaller than a diameter of each of the second pads.

In a wiring substrate, formation of voids due to underfill filling failure is suppressed. A wiring substrate includes an insulating base layer, an insulating layer laminated on the base layer, and an electrically conductive connection terminal projecting from the insulating layer inside an opening. The insulating layer has a first surface with an opening, and a second surface located within the opening and being concave toward the base layer in relation to the first surface. The second surface extends from the first surface to the connection terminal inside the opening. On a cut surface which is a flat surface extending along a lamination direction in which the insulating layer is laminated on the base layer, an angle which is larger than 0 but smaller than 90 is formed between a normal line extending from an arbitrary point on the second surface toward the outside of the insulating layer and a parallel line extending from the arbitrary point toward the connection terminal in parallel to the first surface.

A circuit board including an insulating layer including a first region and a second region; a plurality of outer layer circuit patterns disposed on upper surfaces of the first region and the second region of the insulating layer; and a solder resist including a first part disposed on the first region of the insulating layer and a second part disposed on the second region of the insulating layer. The first part includes an upper surface having a curved surface and exposes an upper surface of an outer layer circuit pattern disposed on the first region of the insulating layer. The second part covers an upper surface of an outer layer circuit pattern disposed on the second region of the insulating layer, and at least a part of the upper surface of the first part is positioned lower than the upper surface of the outer layer circuit pattern.