Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

Aqueous dispersions of artificially synthesized, mussel-inspired polyopamine nanoparticles were inkjet printed on flexible polyethylene terephthalate (PET) substrates. Narrow line patterns (4 m in width) of polydopamine resulted due to evaporatively driven transport (coffee ring effect). The printed patterns were metallized via a site-selective Cu electroless plating process at a controlled temperature (30 C.) for varied bath times. The lowest electrical resistivity value of the plated Cu lines was about 6 times greater than the bulk resistivity of Cu. This process presents an industrially viable way to fabricate Cu conductive fine patterns for flexible electronics at low temperature, and low cost.

Provided herein is a method to printed electronics, and more particularly related to printed electronics on flexible, porous substrates. The method includes applying a coating compound comprising poly (4-vinylpyridine) (P4VP) and SU-8 dissolved in an organic alcohol solution to one or more surface of a flexible, porous substrate, curing the porous substrate at a temperature of at least 130 C. such that the porous substrate is coated with a layer of said coating compound, printing a jet of a transition metal salt catalyst solution onto one or more printing sides of the flexible, porous substrate to deposit a transition metal salt catalyst onto the one or more printing sides, and submerging the substrate in an electroless metal deposition solution to deposit the metal on the flexible, porous substrate, wherein the deposited metal induces the formation of one or more three-dimensional metal-fiber conductive structures within the flexible, porous substrate.

Provided is a method of manufacturing a printed circuit nano-fiber web. A method of manufacturing a printed circuit nano-fiber web according to an embodiment of the present invention includes (1) a step of electrospinning a spinning solution including a fiber-forming ingredient to manufacture a nano-fiber web; and (2) a step of forming a circuit pattern to coat an outer surface of nano-fiber included in a predetermined region on the nano-fiber web using an electroless plating method. According to the present invention, a circuit pattern-printed nano-fiber web having flexibility and resilience suitable for future smart devices may be realized. In addition, a circuit pattern may be densely formed to a uniform thickness on a flexible nano-fiber web using an electroless plating method, and the flexible nano-fiber web may include a plurality of pores. Accordingly, since the printed circuit nano-fiber web may satisfy waterproofness and air permeability characteristics, it can be used in various future industrial fields including medical devices, such as biopatches, and an electronic device, such as smart devices.

A wiring substrate at which a metal wire is formed includes a substrate containing a resin as a main component and an organic substance having a hydroxyl group; and a metal plating layer constituting the metal wire. A formation portion of the metal wire at one surface of the substrate is rougher than a non-formation portion of the metal wire at the one surface of the substrate, and has the organic substance in a state of being embedded in the resin, and a catalyst. The wiring substrate with such a configuration can increase the adhesion of the metal wire to the substrate.

Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A circuit board is formed from a non-catalytic laminate coated with an optically curable catalytic adhesive, which, after curing with an optical source such as UV, has a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and blanket surface plasma etch operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.

The present invention relates to a method for reducing the optical reflectivity of a copper and copper alloy circuitry wherein a thin palladium or palladium alloy layer is deposited by immersion-type plating onto said copper or copper alloy. Thereby, a dull greyish or greyish black or black layer is obtained and the optical reflectivity of said copper or copper alloy circuitry is reduced. The method according to the present invention is particularly suitable in the manufacture of image display devices, touch screen devices and related electronic components.

Depicted embodiments are directed to an Application Specific Electronics Packaging (ASEP) system, which enables the manufacture of additional products using reel to reel (68a, 68b) manufacturing processes as opposed to the batch processes used to currently manufacture electronic products and MIDs. Through certain ASEP embodiments, it is possible to integrate connectors, sensors, LEDs, thermal management, antennas, RFID devices, microprocessors, memory, impedance control, and multi-layer functionality directly into a product.

A pixel circuit, driving method thereof, organic light-emitting display panel and display apparatus, comprise driving transistor, first storage capacitor, collecting unit, writing unit and light-emitting unit; the collecting unit is used for collecting the threshold voltage of the driving transistor and storing the threshold voltage into the first storage capacitor, under the control of the first scan signal; the writing unit is used for storing the data voltage inputted from the input terminal for the data voltage under the control of the second scan signal; and the light-emitting unit is used for emitting lights, driven by the data voltage and a voltage inputted from the input terminal for the controllable low voltage, under the control of the light-emitting control signal. Thus, the organic light-emitting device is not affected by the threshold voltage shift of the driving transistor, which may enhance the image uniformity of the organic light-emitting display panel effectively.