A circuit substrate comprising, in the following stacked order, a resin base material 1 having a dielectric loss tangent of 0.015 or lower, a polyaniline layer 2 comprising a substituted or unsubstituted polyaniline, and a metal layer 3, wherein the metal layer 3 has a surface roughness Rz.sub.JIS of 0.5 μm or less at the surface on the side of the polyaniline layer 2.

A molded interconnect device that comprises a substrate and conductive elements disposed on the substrate is provided. The substrate comprising a polymer composition containing a polymer matrix that includes a thermotropic liquid crystalline polymer and from about 10 parts to about 80 parts by weight of a mineral filler per 100 parts by weight of the polymer matrix. The mineral filler has an average diameter of about 25 micrometers or less. The polymer composition contains copper in an amount of about 1,000 parts per million or less and chromium in an amount of about 2,000 parts per million or less, and further exhibits a surface resistivity of about 1×1014 ohm or more.

A method for manufacturing electrically conductive structures, preferably conductive pathway structures using laser beams on a non-conductive carrier (LDS method), wherein a non-conductive carrier material is provided which contains at least one inorganic metal phosphate compound and at least one stabiliser finely distributed or dissolved therein, the carrier material is irradiated in regions by laser beams generating the electrically conductive structures in the irradiated regions.

A wiring substrate at which a metal wire is formed includes a substrate containing a resin as a main component and an organic substance having a hydroxyl group; and a metal plating layer constituting the metal wire. A formation portion of the metal wire at one surface of the substrate is rougher than a non-formation portion of the metal wire at the one surface of the substrate, and has the organic substance in a state of being embedded in the resin, and a catalyst. The wiring substrate with such a configuration can increase the adhesion of the metal wire to the substrate.

A laminate comprising a substrate; and a plating-forming layer disposed on at least one surface of both surfaces of the substrate and containing a thermoplastic resin and a plating catalyst, wherein the plating-forming layer further satisfies conditions of the following (1) and/or (2),

(1) the plating-forming layer contains a dispersing agent for dispersing the plating catalyst
(2) an abundance of the plating catalyst on a surface side of the plating-forming layer is higher than an abundance of the plating catalyst on the substrate side of the plating-forming layer.

A method for forming a metal film includes forming an oxide layer on a to-be-treated surface of a to-be-treated object by bringing the to-be-treated surface into contact with a reaction solution containing fluorine and an oxide precursor, removing fluorine in the oxide layer, supporting a catalyst on the oxide layer by bringing the oxide layer into contact with a catalyst solution, and depositing a metal film on the oxide layer by bringing the oxide layer into contact with an electroless plating liquid.

Method for forming a metal film includes forming an oxide layer on a to-be-treated surface of a to-be-treated object by bringing the to-be-treated surface into contact with a reaction solution containing fluorine and an oxide precursor, removing fluorine in the oxide layer, supporting a catalyst on the oxide layer by bringing the oxide layer into contact with a catalyst solution, and depositing a metal film on the oxide layer by bringing the oxide layer into contact with an electroless plating liquid.

The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) including microvias filled with copper comprising the steps of: a1) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a cover layer, and (iii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b1) depositing a conductive layer; or a2) providing a multi-layer substrate comprising (i) a stack assembly of an electrically conductive interlayer embedded between two insulating layers, (ii) a microvia extending from the peripheral surface and ending on the conductive interlayer; b2) depositing a conductive layer; and c) electrodepositing a copper filling in the microvia and a first copper layer on the conductive layer which form together a planar surface and the thickness of the first copper layer is from 0.1 to 3 μm.

The present invention refers to a method of preparing a high density interconnect printed circuit board (HDI PCB) or IC substrates including through-holes and/or grate structures filled with copper, which comprises the steps of: a) providing a multi-layer substrate; b) forming a non-copper conductive layer or a copper layer on the cover layer and on an inner surface of the through-hole, respectively on an inner surface of the grate structure; c) forming a patterned masking film; d) electrodepositing copper; e) removing the masking film; and f) electrodepositing a copper filling.

Provided is a method for manufacturing a wiring board that forms a wiring layer having favorable adhesion without a resin resist pattern. A method prepares a substrate with seed-layer including: a underlayer on the surface of an insulating substrate; and a seed layer on the surface of the underlayer, the seed layer having a predetermined pattern and containing metal; presses a solid electrolyte membrane against the seed layer and the underlayer, and applies voltage between an anode and the underlayer to reduce metal ions in the membrane and form a metal layer on the surface of the seed layer; and removes an exposed region without the seed layer and the metal layer of the underlayer to form a wiring layer including the underlayer, the seed layer and the metal layer on the surface of the substrate.