Methods of patterning electroless metals on a substrate are presented. The substrate is covered by a blocking reagent. After formation of a catalyst blocking layer on the substrate, portions of the catalyst blocking layer are removed to form a circuit pattern. A catalyst is placed the surfaces of both the catalyst blocking layer and the exposed substrate. The catalyst blocking layer prevents or reduces catalytic activity of the catalyst. Electroless metal plating is performed to plate a metal at the active portions of the catalyst.

Method of manufacturing laminate body by: curing thermosetting resin composition on a support; laminating the curable resin onto a substrate; heating the laminate; forming a via hole in the cured resin layer; peeling the supporting body from the cured composite; performing a second heating of the cured composite; removing resin residue in the via hole of the cured composite; and forming a conductor layer on an inner wall surface of the via hole by electroless plating or a combination of electroless plating and electrolytic plating.

Method of manufacturing laminate body by: curing thermosetting resin composition on a support; laminating the curable resin onto a substrate; heating the laminate; forming a via hole in the cured resin layer; peeling the supporting body from the cured composite; performing a second heating of the cured composite; removing resin residue in the via hole of the cured composite; and forming a conductor layer on an inner wall surface of the via hole.

The present invention is to solve the problem of residues in nanoimprint lithography without losing the merits thereof, i.e., low cost and high productivity, and provides a metal film formation technique advantageous in pattern accuracy and product reliability over time. A metal film formation method according to the present invention comprises a first step where a nanoimprint lithography material is deposited on an insulating substrate to form an underlayer, a second step where the underlayer is pressed with a mold having protrusions to pattern by nanoimprint lithography, a third step where residues of the underlayer at regions pressed with the protrusions of the mold are evaporated by heating to be removed, and forming a metal film at least on the patterned underlayer. A nanoimprint lithography material according to the present invention contains a catalyst for a metal plating.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A substrate includes: a signal line via, a ground line via, and a power supply line via; a first group of first conductor layers formed at a first wiring layer level and coupled to the signal line via, the ground line via, and the power supply line via; a second conductor layer formed at a second wiring layer level and coupled to the power supply line via; a second group of third conductor layers formed at a third wiring layer level and coupled to the signal line via, the ground line via, and the power supply line via; a first insulating layer; and a second insulating layer, wherein the second insulating layer has an opening with a third insulating layer, a relative dielectric constant of the second insulating layer is higher than the first insulating layer and the third insulating layer, and the opening reaches a conductor pattern.

In a semiconductor device, protective films are formed on facing side surfaces of a plurality of circuit patterns and a plating process or the like is not performed on parts aside from the side surfaces where the protective films are formed. This means that when semiconductor elements and contact elements are directly bonded via solder onto the plurality of circuit patterns, a drop-in wettability of the plurality of circuit patterns for the solder is avoided.

The purpose of the present invention is to provide a heat-resistant power module substrate, a heat-resistant plating film, and plating solution capable of preventing occurrence of crack in a plating film, even if TCT with high temperature side set to 200 C. or higher is performed. A heat-resistant power module substrate for mounting a power semiconductor generating high heat until maximum 300 C., at least comprising: a base material composed of aluminum oxide, aluminum nitride or silicon nitride; a circuit composed of copper or aluminum and formed on the base material directly or via brazing material; and a plating film formed on a surface of the circuit, wherein the plating film is an electroless nickel-phosphorus-molybdenum plating film, and phosphorus content in the plating film is 10.5% to 13% by weight.

A circuit board of the present disclosure includes a substrate, a conductor layer located on the substrate, a reflective layer located on the conductor layer, and a resin layer located on the substrate to be in contact with the conductor layer and the reflective layer. In a surface of the reflective layer, arithmetic mean roughness Ra obtained from a roughness profile is less than 0.2 m, and a ratio of kurtosis Rku obtained from a roughness profile to skewness Rsk obtained from a roughness profile is 5 or more and 15 or less.

A printed circuit board according to one embodiment of the present invention is a printed circuit board including a plate-shaped or a sheet-shaped insulating material having a penetrating hole, and a metal plating layer layered on both surfaces of the insulating material and an inner peripheral surface of the insulating material, wherein an inner diameter of the penetrating hole monotonically decreases from a top surface of the insulating material toward a back surface, and wherein the inner diameter of the penetrating hole at a center in a thickness direction of the insulating material is smaller than an average of an opening diameter on the top side and an opening diameter on the back side.