The present invention provides methods for fabricating graphene workpieces. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.

Embodiments relate to placing light emitting diodes from a carrier substrate to a target substrate. At least one LED is embedded in a polymer layer on a substrate. The polymer layer is etched between the at least one LED and the substrate. A thickness of the polymer layer is monitored during etching of the polymer layer. The etching of the polymer layer is terminated responsive to determining that the thickness of the polymer layer is in a target range or a target value. A pick-up-tool (PUT) is brought into contact with at least one surface of the at least one LED facing away from the substrate responsive to dry-etching the polymer layer, and the PUT is lifted with the at least one LED attached to the PUT.

There are provided methods of growing arrays of light emitters on substrates. An example method includes adjusting a growth parameter of a given light emitter of an array of light emitters on a substrate to obtain an adjusted growth parameter. The adjusting may be based on a location of the given light emitter on the substrate. The adjusting may be to compensate for nonuniformity in a growth profile of the light emitters across the substrate. The nonuniformity may be associated with a corresponding nonuniformity among wavelengths of light generated by the light emitters. Adjusting the growth parameter may be to adjust the corresponding nonuniformity. The method may also include growing the given light emitter on the substrate based on the adjusted growth parameter. Arrays of corresponding light emitters are also described.

A method and apparatus for conducting heat away from a semiconductor die are disclosed. A board assembly is disclosed that includes a circuit board, a semiconductor die electrically coupled to the circuit board and a Chemical Vapor Deposition Diamond (CVDD) coated wire. A portion of the CVDD-coated wire extends between a hot-spot on the semiconductor die and the circuit board. The board assembly includes a layer of thermally conductive paste that is disposed between the hot-spot on the semiconductor die and the circuit board. The layer of thermally conductive paste is in direct contact with a portion of the CVDD-coated wire.

A method for depositing coating onto a substrate includes providing a monomer for creation of a protective coating on a substrate, energizing the monomer with a plasma generation system, and polymerizing the energized monomer onto the substrate in a plasma-enhanced chemical vapor deposition (PECVD) chamber.

A method of forming an electronic circuit component comprises (a) depositing nanoparticle ink comprising conductive material on a substrate; (b) curing the nanoparticle ink to form cured nanoparticle ink; (c) subjecting the cured nanoparticle ink to a first precursor gas to form a first layer of precursor material on the cured nanoparticle ink; and (d) subjecting the first layer of precursor material to a second precursor gas so that the first layer of precursor material reacts with the second precursor gas to form an oxide layer on the cured nanoparticle ink.

A versatile, thermally stable and economically effective corrosion inhibition treatment for copper (Cu) metal and selected metals surface through a single step chemical vapor deposition (CVD) of selected inhibitor compounds at temperatures as low as 100-200 C. is described in this invention. The resulting CVD deposited inhibition coating is thermally stable to 300 C. and protects Cu and selected metals from active corrosion in various technologically important operational environments. The selective coating for copper metal is achieved by controlling the chemistry of bonding between the Copper metal surface and inhibitor material used. The technique can be accomplished by using one or more inhibitors separately or in combination in order to create an all-terrain stable & robust corrosion prevention coating for copper metal.

A method of encapsulating an electronic assembly comprises disposing a plurality of electrically non-conductive particles on a substrate which carries one or more components of the electronic assembly; introducing a reactive parylene monomer in a vapor form into interstitial spaces among the plurality of the electrically non-conductive particles; and forming a parylene binder in the interstitial spaces of the electrically non-conductive particles from the reactive parylene monomer.

A method for formation of a patterned solder mask (10) on a substrate is provided, in which method the mask is deposited by a process of chemical deposition in vapor phase. A method for manufacturing a printed circuit board and/or an electronic component comprising formation of said patterned solder mask is further provided.

A method for manufacturing a flexible circuit board is provided. The method for manufacturing a flexible circuit board includes the following steps: providing a carrier substrate, forming a flexible substrate on the carrier substrate, and forming a plurality of circuit strings on the flexible substrate. A flexible circuit board manufactured by the above method is also provided.