A method for depositing a protective coating onto a substrate, wherein the protective coating comprises (i) a moisture-barrier layer which is in contact with the substrate and which comprises a first sub-layer, optionally one or more intermediate sub-layers, and a final sub-layer, (ii) a mechanical-protective layer which is inorganic, and (iii) a gradient layer interposing the moisture-barrier layer and the mechanical-protective layer.

An electronic system includes a printed circuit board (PCB), a component affixed to the PCB, and a conformal coating layer on the PCB and the component. The conformal coating layer includes parylene. Furthermore, the electronic system includes an underfill layer adjacent to the conformal coating layer, filling a gap between the PCB and the component. Other embodiments being described and/or claimed.

Processes for laminating a graphene-coated printed circuit board (PCB) are disclosed. An example laminated PCB may include a lamination stack that may include an inner core, an adhesive layer, and at least one graphene-metal structure. Pressure and heatwhich may be applied under vacuum or controlled gas atmospheremay be applied to the lamination stack, after all materials have been placed. The graphene of the graphene-metal structure is designed to promote high frequency performance and heat management within the PCB.

A method of encapsulating an electronic assembly comprises disposing a plurality of electrically non-conductive particles on a substrate which carries one or more components of the electronic assembly; introducing a reactive parylene monomer in a vapor form into interstitial spaces among the plurality of the electrically non-conductive particles; and forming a parylene binder in the interstitial spaces of the electrically non-conductive particles from the reactive parylene monomer.

The present invention provides methods for fabricating graphene workpieces. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.

An electrical assembly which has a multi-layer conformal coating on at least one surface of the electrical assembly, wherein each layer of the multi-layer coating is obtainable by plasma deposition of a precursor mixture comprising (a) one or more organosilicon compounds, (b) optionally O.sub.2, N.sub.2O, NO.sub.2, H.sub.2, NH.sub.3, N.sub.2, SiF.sub.4 and/or hexafluoropropylene (HFP), and (c) optionally He, Ar and/or Kr. The chemistry of the resulting plasma-deposited material chemistry can be described by the general formula: SiO.sub.xH.sub.yC.sub.zF.sub.aN.sub.b. The properties of the conformal coating are tailored by tuning the values of x, y, z, a and b.

An electrical assembly which has a multi-layer conformal coating comprising three or more layers on at least one surface of the electrical assembly, wherein the lowest layer of the multi-layer conformal coating, which is in contact with the at least one surface of the electrical assembly, is obtainable by plasma deposition of a precursor mixture comprising (a) one or more organo-silicon compounds, (b) optionally O.sub.2, N.sub.2O, NO.sub.2, H.sub.2, NH.sub.3 and/or N.sub.2, and (c) optionally He, Ar and/or Kr; the uppermost layer of the multi-layer conformal coating is obtainable by plasma deposition of a precursor mixture comprising (a) one or more organosilicon compounds, (b) optionally O.sub.2, N.sub.2O, NO.sub.2, H.sub.2, NH.sub.3 and/or N.sub.2, and (c) optionally He, Ar and/or Kr; and the multi-layer coating comprises one or more layers which is obtainable by plasma deposition of a precursor mixture comprising (a) one or more hydrocarbon compounds of formula (A), (b) optionally NH.sub.3, N.sub.2O, N.sub.2, NO.sub.2, CH.sub.4, C.sub.2H.sub.6, C.sub.3H.sub.6 and/or C.sub.3H.sub.8, and (c) optionally He, Ar and/or Kr, Z.sub.1 represents C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; Z.sub.2 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; Z.sub.3 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; Z.sub.4 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; Z.sub.5 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl; and Z.sub.6 represents hydrogen, C.sub.1-C.sub.3 alkyl or C.sub.2-C.sub.3 alkenyl.

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The present invention provides methods for fabricating graphene workpieces. The present invention also provides for products produced by the methods of the present invention and for apparatuses used to perform the methods of the present invention.

A manufacturing method of a circuit board. The manufacturing method includes: providing a first substrate; forming an opening on the first substrate; disposing a second substrate, which has a plurality of through holes in the opening; forming an adhesive layer between the first substrate and the second substrate; forming a bonding layer on the first substrate and the second substrate; forming a metal layer on the bonding layer; and patterning the metal layer to form a circuit layer. A circuit board is also disclosed in the disclosure.

A wiring board includes a wiring layer, an insulating layer, an oxide thin film, a seed layer, and a conductive layer. The insulating layer is laminated on the wiring layer and includes an opening portion that penetrates until the wiring layer. The oxide thin film is formed on a surface of the insulating layer including an inner wall surface of the opening portion. The seed layer is made of metal and that is laminated on the oxide thin film at a position of the opening portion. The conductive layer is formed on the seed layer. The oxide thin film is a thin film that has a thickness of 1 to 100 angstroms and covers a surface of the insulating layer including the inner wall surface of the opening portion and a surface of the wiring layer exposed from a bottom portion of the opening portion.