The present disclosure discloses a semiconductor device and a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes following steps: providing a semiconductor substrate, and forming active regions and trench isolation structures in the semiconductor substrate, wherein the trench isolation structures are located between the active regions; forming first grooves in the active regions; filling the first grooves to form inversion polysilicon layers, the inversion polysilicon layers being inversely doped with the active regions; forming second grooves, the second grooves running through the polysilicon layers and a part of the semiconductor substrate, and reserving parts of the inversion polysilicon layers located on side faces of the second grooves; and, forming buried word line structures in the second grooves.

The present disclosure provides an integrated circuit memory and the method of forming the same, the memory includes: a substrate, in which a plurality of active areas arranged in an array are provided; a conducting line group, formed in the substrate, and including a plurality of conducting lines sequentially arranged along a first direction, each conducting line extending in a second direction and being connected to the corresponding active area, and ends of two adjacent conducting lines on a same side being staggered from each other in the second direction; and a plurality of contact pads, formed on the substrate, one of the contact pads being connected to an end of one conducting line, and two adjacent contact pads located on the same side being staggered in the second direction.

The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.

A semiconductor memory device may be provided. The semiconductor memory device may include a bit line, a channel pattern on the bit line, the channel pattern including a horizontal channel portion, which is provided on the bit line, and a vertical channel portion, which is vertically extended from the horizontal channel portion, a word line provided on the channel pattern to cross the bit line, the word line including a horizontal portion, which is provided on the horizontal channel portion, and a vertical portion, which is vertically extended from the horizontal portion to face the vertical channel portion, and a gate insulating pattern provided between the channel pattern and the word line.

A semiconductor memory device is disclosed. The semiconductor memory device may include a bit line extending in a first direction, a word line extending in a second direction perpendicular to the first direction, a channel pattern between the bit line and the word line, the channel pattern including a horizontal channel portion, which is connected to the bit line, and a vertical channel portion, which is extended from the horizontal channel portion in a third direction perpendicular to the first and second directions, and a gate insulating pattern between the word line and the channel pattern. The horizontal channel portion of the channel pattern may be disposed parallel to a fourth direction that is inclined to the first and second directions.

The present disclosure provides a method for manufacturing a semiconductor device and a semiconductor device. The method for manufacturing a semiconductor device includes: providing a substrate; forming a plurality of first structures extending in a first direction on the substrate; forming a sacrificial layer on sidewalls of the first structures; forming an outer spacer layer on a sidewall of the sacrificial layer; removing part of the outer spacer layer to obtain a patterned outer spacer layer that exposes part of the sacrificial layer; and removing the sacrificial layer to form air gaps between the patterned outer spacer layer and the first structures.

A semiconductor device and a manufacturing method thereof are provided. The method includes: forming a plurality of first trenches extending in a first direction on the substrate; forming a plurality of second trenches extending in a second direction on the substrate on which the first trenches are formed; forming a first isolation layer in at least one of the first trenches and at least one of the second trenches, in which o first gaps are respectively provided between the first isolation layer and sidewalls on both sides of the first trench; forming two bit lines which are parallel to each other and extend in the first direction by depositing conductive layers of a first conductive material at bottoms of the first gaps on both sides of the first trench; and forming word lines extending in the second direction above the conductive layers in the first trench and the second trench.

A method for fabricating a semiconductor device includes forming a mold structure on a substrate, the mold structure including inter-electrode insulating films and sacrificial films alternately and repeatedly stacked in a first direction, forming a channel hole which penetrates the mold structure in the first direction, forming a vertical channel structure inside the channel hole, removing the sacrificial films to form trenches which expose the vertical channel structure, the trenches extending in a second direction perpendicular to the first direction, and forming metallic lines which fill the trenches, respectively, each of the metallic lines being formed as a single layer, using a wet deposition process.

A transistor comprises a substrate; a gate trench located in the substrate; a first gate layer located in the gate trench, and a material of the first gate layer comprising TiN or comprising W; a second gate layer located in the gate trench and covering the first gate layer, a material of the second gate layer comprising TiNx, wherein 0 ≤ x< 1, and a work function of the second gate layer being smaller than a work function of the first gate layer.

A method for forming a semiconductor structure includes: providing a semiconductor substrate including a plurality of first semiconductor pillars and bit line isolation trenches arranged at intervals in a first direction; in which the bit line isolation trenches extend in a second direction, the first direction being perpendicular to the second direction; forming a bit line isolation layer in a bit line isolation trench; in which a gap is provided between the bit line isolation layer and the bit line isolation trench, in which the gap is located at a bottom corner of the bit line isolation trench and extends in the second direction, and exposes part of the bottom of the bit line isolation trench; etching a first semiconductor pillar in the first direction through the gap to form a bit line trench; forming a bit line in the bit line trench.