A method for manufacturing a semiconductor device includes forming a first dielectric layer on a substrate, forming a carbon nanotube (CNT) layer on the first dielectric layer, forming a second dielectric layer on the carbon nanotube (CNT) layer, patterning a plurality of trenches in the second dielectric layer exposing corresponding portions of the carbon nanotube (CNT) layer, forming a plurality of contacts respectively in the plurality of trenches on the exposed portions of the carbon nanotube (CNT) layer, performing a thermal annealing process to create end-bonds between the plurality of the contacts and the carbon nanotube (CNT) layer, and depositing a passivation layer on the plurality of the contacts and the second dielectric layer.

An electronic switching element is described having, in sequence, a first electrode, a molecular layer bonded to a substrate, and a second electrode. The molecular layer contains compounds of formula I, R.sup.1-(A.sup.1-Z.sup.1).sub.r—B.sup.1—(Z.sup.2-A.sup.2).sub.s-Sp-G, wherein A.sup.1, A.sup.2, B.sup.1, Z.sup.1, Z.sup.2, Sp, G, r, and s are as defined herein, in which a mesogenic radical is bonded to the substrate via a spacer group, Sp, by means of an anchor group, G. The switching element is suitable for production of components that can operate as a memristive device for digital information storage.

A method for manufacturing a transistor being a bottom-gate transistor is provided. The method for manufacturing a transistor includes a step of forming a first metal layer 32 on an insulator layer 20 provided on a substrate 10 including a gate electrode, a step of applying a resist onto the first metal layer 32, and patterning the first metal layer 32 by a photolithographic method, an oxide film removal step of removing an oxide film 26 formed on the patterned first metal layer 32, and a step of forming a source electrode and a drain electrode by forming a second metal layer 42 on the first metal layer 32.

A method for enhancing aggregation state stability of organic semiconductor (OSC) films includes constructing the OSC film; introducing uniform and discontinuous nanoparticles on a surface of the film or an inside of the film. Electrical properties of the OSC film are not influenced by introducing the nanoparticles. Grain boundary, dislocation, stacking fault, and surface of the film are pinned by the nanoparticles, increasing potential barrier of the aggregation state evolution of the film, and thus enhancing the stability of the aggregation state and greatly improving maximum working temperature and storage lifetime of organic field-effect transistors. Under room temperature storage, morphology of the OSC film introduced with the nanoparticles is difficult to change, so that the stability of electrical properties of organic transistor components prepared from the film is ensured in a high-temperature and atmospheric working environment.

A method for enhancing aggregation state stability of organic semiconductor (OSC) films includes constructing the OSC film; introducing uniform and discontinuous nanoparticles on a surface of the film or an inside of the film. Electrical properties of the OSC film are not influenced by introducing the nanoparticles. Grain boundary, dislocation, stacking fault, and surface of the film are pinned by the nanoparticles, increasing potential barrier of the aggregation state evolution of the film, and thus enhancing the stability of the aggregation state and greatly improving maximum working temperature and storage lifetime of organic field-effect transistors. Under room temperature storage, morphology of the OSC film introduced with the nanoparticles is difficult to change, so that the stability of electrical properties of organic transistor components prepared from the film is ensured in a high-temperature and atmospheric working environment.

A transparent conductive film includes a metal chalcogenide compound doped with a halogen and having a sheet resistance at room temperature of less than or equal to about 60 ohm/sq.

A self-aligned short-channel SASC electronic device includes a first semiconductor layer formed on a substrate; a first metal layer formed on a first portion of the first semiconductor layer; a first dielectric layer formed on the first metal layer and extended with a dielectric extension on a second portion of the first semiconductor layer that extends from the first portion of the first semiconductor layer, the dielectric extension defining a channel length of a channel in the first semiconductor layer; and a gate electrode formed on the substrate and capacitively coupled with the channel. The dielectric extension is conformally grown on the first semiconductor layer in a self-aligned manner. The channel length is less than about 800 nm, preferably, less than about 200 nm, more preferably, about 135 nm.

In a method of forming a gate-all-around field effect transistor, a gate structure is formed surrounding a channel portion of a carbon nanotube. An inner spacer is formed surrounding a source/drain extension portion of the carbon nanotube, which extends outward from the channel portion of the carbon nanotube. The inner spacer includes two dielectric layers that form interface dipole. The interface dipole introduces doping to the source/drain extension portion of the carbon nanotube.

Provided are a polymer thin-film transistor and a method of fabricating the same. Donor-acceptor copolymer-based field-effect transistors (FETs) have attracted considerable attention from technological and academic perspectives due to their low band gap, high mobility, low cost, easy solution processability, flexibility, and stretchability. Large-area films can be formed through meniscus-guided coating among various solution-processing techniques. 29-Diketopyrrolopyrrole-selenophene vinylene selenophene (29-DPP-SVS) donor-acceptor copolymer-based FETs have already shown excellent performance due to their short π-π stacking distance and strong π-π interaction. Charge carrier mobility of these types of semiconductor materials significantly depends on an applied electric field. Accordingly, detailed analysis of the electric-field dependency of charge carrier mobility is necessary to understand the transport mechanism within the material. Therefore, 29-DPP-S VS-based FETs are fabricated by varying the blade coating (BC) speed of a semiconductor layer. The effect of the BC speed on the electrical characteristics of the FETs is studied through the analysis of electric-field-dependent mobility. The results show that the charge carrier mobility of different FETs depends on the applied electric field and that the type of dependency is Poole-Frenkel. At an optimized BC speed (2 mm s.sup.−1), the device shows maximum zero-field mobility (3.39 cm.sup.2V.sup.−1s.sup.−1) due to the low trap density within the conductive channel.

Provided are a polymer thin-film transistor and a method of fabricating the same. Donor-acceptor copolymer-based field-effect transistors (FETs) have attracted considerable attention from technological and academic perspectives due to their low band gap, high mobility, low cost, easy solution processability, flexibility, and stretchability. Large-area films can be formed through meniscus-guided coating among various solution-processing techniques. 29-Diketopyrrolopyrrole-selenophene vinylene selenophene (29-DPP-SVS) donor-acceptor copolymer-based FETs have already shown excellent performance due to their short π-π stacking distance and strong π-π interaction. Charge carrier mobility of these types of semiconductor materials significantly depends on an applied electric field. Accordingly, detailed analysis of the electric-field dependency of charge carrier mobility is necessary to understand the transport mechanism within the material. Therefore, 29-DPP-S VS-based FETs are fabricated by varying the blade coating (BC) speed of a semiconductor layer. The effect of the BC speed on the electrical characteristics of the FETs is studied through the analysis of electric-field-dependent mobility. The results show that the charge carrier mobility of different FETs depends on the applied electric field and that the type of dependency is Poole-Frenkel. At an optimized BC speed (2 mm s.sup.−1), the device shows maximum zero-field mobility (3.39 cm.sup.2V.sup.−1s.sup.−1) due to the low trap density within the conductive channel.