Disclosed are an organic semiconductor element, a fabrication method thereof, woven and non-woven fabric structures therewith, and a semiconductor device therewith. The organic semiconductor element comprising an organic semiconductor layer; a linear source electrode and a linear drain electrode provided in the organic semiconductor layer and spaced apart from and parallel to each other; a linear gate electrode provided on the organic semiconductor layer to cross the linear source and drain electrodes; and an electrolyte layer in contact with the organic semiconductor layer and the linear gate electrode.

Laminate, method of manufacturing laminate, transistor, and method of manufacturing transistor using a composition having the following (a) to (c): (a) a first organic compound represented by Formula (1) below (R represents a hydrogen atom or a glycidyl group. A plurality of Rs may be identical to or different from each other, but each of at least two Rs is a glycidyl group), (b) a second organic compound represented by Formula (2) below, and (c) a photocationic polymerization initiator

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A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit which are provided on the same plane. The driver circuit includes a selection circuit and a buffer circuit. The selection circuit includes a first transistor. The buffer circuit includes a second transistor. The first transistor has a region overlapping with the second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is electrically connected to the pixel circuit.

An organic thin film transistor, a manufacturing method thereof and an array substrate are provided. The manufacturing method of an organic thin film transistor includes: forming an organic semiconductor layer; partially sheltering the organic semiconductor layer, so that a sheltered region and an unsheltered region are formed on the organic semiconductor layer, the sheltered region corresponding to a region where an active layer of the organic thin film transistor needs to be formed; and doping the organic semiconductor layer, so that the organic semiconductor layer in correspondence with the sheltered region is not doped, and the organic semiconductor layer in correspondence with the unsheltered region is doped.

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

The invention relates to a method for producing a vertical organic field-effect transistor, in which a vertical organic field-effect transistor with a layer arrangement is produced on a substrate, said layer arrangement including transistor electrodes, namely a first electrode (23; 24), a second electrode (23; 24) and a third electrode (32), electrically insulating layers (25; 34) and an organic semiconductor layer (28). In addition, a vertical organic field-effect transistor is provided, which includes a layer arrangement with transistor electrodes on a substrate (21).

A thin-film transistor including a substrate, a gate electrode positioned on the substrate, a gate insulating layer positioned on the substrate and the gate electrode, a source electrode positioned on the gate insulating layer, a drain electrode positioned on the gate insulating layer, a semiconductor layer connected to the source electrode and the drain electrode, and a protective layer positioned on the semiconductor layer. The source electrode and the drain electrode each have a surface including asperities.

A method for preparing an ohmic contact electrode of a GaN-based device. Said method comprises the following steps: growing a first dielectric layer (203) on an upper surface of a device (S1); implanting silicon ions and/or indium ions in a region of the first dielectric layer (203) corresponding to an ohmic contact electrode region, and in the ohmic contact electrode region of the device (S2); growing a second dielectric layer (206) on an upper surface of the first dielectric layer (203) (S3); activating the silicon ions and/or the indium ions by means of a high temperature annealing process, so as to form an N-type heavy doping (S4); respectively removing portions, corresponding to the ohmic contact electrode region, of the first dielectric layer (203) and the second dielectric layer (206) (S5); growing a metal layer (208) on the upper surface of the ohmic contact electrode region of the device, so as to form an ohmic contact electrode (S6). The ohmic contact electrode prepared by the method can ensure that the metal layer (208) has flat surfaces, smooth and regular edges, and said electrode has stable device breakdown voltage, and is reliable and has a long service life.

Methods for producing organic field effect transistors, organic field effect transistors, and electronic switching devices are provided. The methods may include providing a gate electrode and a gate insulator assigned to the gate electrode for electrical insulation on a substrate, depositing a first organic semiconducting layer on the gate insulator, generating a first electrode and an electrode insulator assigned to the first electrode for electrical insulation on the first organic semiconducting layer, depositing a second organic semiconducting layer on the first organic semiconducting layer and the electrode insulator, and generating a second electrode on the second organic semiconducting layer.

Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.