Provided are a display motherboard, a preparation method thereof, a display substrate and a display device. The display motherboard includes a plurality of display substrate regions and a cutting region located at a periphery of each of the plurality of display substrate regions; the display motherboard includes a driving structure layer arranged in each of the plurality of display substrate regions and a marking structure layer arranged in each cutting region, wherein the marking structure layer includes a cutting mark layer; and a planarization layer arranged on the driving structure layer and the marking structure layer, and covering the marking structure layer.

Provided are a display panel and a manufacturing method thereof, and a display device. At least one sub-pixel comprises a light emitting element; a first transistor comprising a first active layer comprising first and second electrode regions connected to data line and power line respectively; a capacitor; a second transistor comprising a second active layer; a third transistor comprising a third gate connected to a reset line, and a third active layer comprising a third channel region. Orthographic projections of the power line, the reset line, the third channel region and the data line are first, second, third and fourth projections respectively. The region of first, second, and third projections overlapping with each other is first region, and regions of first projection overlapping with second projection and not overlapping with third projection comprise a third region and a second region having an area not smaller than the third region.

A display device includes: a base substrate; a TFT layer including a plurality of pixel circuits arranged; and a light-emitting element layer. Each of the plurality of pixel circuits includes: a TFT including a semiconductor layer, a gate insulating film, and a gate electrode; and a capacitor including the gate electrode, a first inorganic insulating film, and a capacitive electrode. The capacitive electrode extends all around a perimeter of the gate electrode and extends to an outside of the perimeter. An angle formed between an upper surface of the base substrate and at least a part of an end surface in a circumferential direction of the gate electrode not overlapping the semiconductor layer in the plan view is greater than an angle formed between the upper surface of the base substrate and an end surface of the gate electrode overlapping the semiconductor layer in the plan view.

A thin film transistor array includes thin film transistors positioned in a matrix, each of the thin film transistors including a substrate, a gate electrode formed on the substrate, a gate insulation layer formed on the gate electrode, a source electrode formed on the gate insulation layer, a drain electrode formed on the gate insulation layer, a pixel electrode formed on the gate insulation layer and connected to the source electrode and the drain electrode, a semiconductor layer formed between the source electrode and the drain electrode, an interlayer insulation film covering the source electrode, the drain electrode, the semiconductor layer and a portion of the pixel electrode, and an upper pixel electrode formed on the interlayer insulation film and connected to the pixel electrode. The interlayer insulation film has one or more concave portions and one or more via hole portions.

Disclosed is an organic light emitting display device including an anode, a cathode, a plurality of organic layers and a partition member. The plurality of organic layers is disposed between the anode and the cathode, where at least one layer is separated to minimize current leakage into neighboring pixels. The partition member is disposed between the neighboring pixels and configured to separate the plurality of organic layers. The least one separated layer includes a charge generation layer. Because at least one layer is separated, current leakage into neighboring pixels can be minimized. Accordingly, defects resulting from light leakage and the mixing of colors of light from neighboring pixels may be reduced and display quality is enhanced.

Pixels each including a light emitting unit formed by laminating a first electrode, an organic layer, and a second electrode are arranged in a two-dimensional matrix. The organic layer includes multiple light emitting layers of different types and a light emission separation layer. Each of the multiple light emitting layers of different types is laminated as a common layer extending continuously over the pixels. The light emission separation layer is arranged between two adjacent light emitting layers, and is formed so as to have a different configuration depending on a display color of the pixel.

A display panel includes: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active layer includes: a core layer in which a concentration of the boron is greater than a concentration of the fluorine; and a surface layer on the core layer and in which a concentration of the fluorine is greater than a concentration of the boron.

A display substrate, a method of manufacturing the same, and a display apparatus are provided. Multiple subpixels in the display substrate include first and second subpixels. Each subpixel includes a power signal line pattern and a light-emitting element. The power signal line pattern includes first and second power line portions. At least a part of the first power line portion extends in a second direction. The light-emitting element includes an anode pattern. In the display substrate, an overlap between the anode pattern of the first subpixel and the power signal line pattern is larger in area than an overlap between the anode pattern of the second subpixel and the power signal line pattern, an overlap between the anode pattern of the first subpixel and the first power line portion is larger in area than an overlap between the anode pattern of the first subpixel and the second power line portion.

A display substrate, a method for manufacturing the display substrate, and a display device. In the display substrate, the first sub-pixel and the second sub-pixel each include: a power signal line pattern, at least part of the power signal line pattern extends along the second direction; and a power compensation pattern, at least part of the power compensation pattern extends along the first direction, the power signal line pattern and the power compensation pattern are both located on a side of the first data line pattern and the second data line pattern close to the substrate; the power compensation pattern is electrically connected to the power signal line pattern and a power signal line pattern in an adjacent sub-pixel along the first direction.

An organic light emitting display (OLED) device is disclosed. The OLED device includes a substrate configured to include a sub-pixel defined into an emission region and a driving region. A first bank pattern configured to define the emission region of the sub-pixel is formed on the substrate. A second bank pattern configured to include an opening, which exposes the emission region and a part of the driving region, is formed on a part of an upper surface of the first bank pattern. An organic emission layer is formed in the opening. As such, the occupied area of the organic emission layer becomes wider. Therefore, the thickness deviation of the organic emission layer is prevented or minimized.