Provided are a deposition mask, a method of manufacturing a display device using the deposition mask, and a display device. The deposition mask includes a main frame defining a first opening; ribs extending away from a side of the main frame, the ribs being apart from each other and defining second openings; and bridges connecting the ribs to one another across the second openings, wherein the bridges and the ribs form the same top surface, and a thickness of each of the bridges is less than a thickness of each of the ribs.

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit.

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a lower substrate including a display area and a non-display area surrounding the display area, wherein a plurality of pixels are formed in the display area. The OLED display also includes an embedded circuit formed in the configured to apply a plurality of signals to the pixels, and an initialization wiring formed in the non-display area and configured to apply an initialization voltage to each of the pixels. The initialization circuit is formed in a layer so as to at least partially overlap with the area of the embedded circuit.

A display device includes a substrate including a display area in which a display element is arranged and a non-display area having a pad area outside the display area, a first thin-film transistor arranged in the display area of the substrate and including a first semiconductor layer and a first gate electrode insulated from the first semiconductor layer, a first voltage line which extends in a first direction on the first gate electrode, a data line apart from the first voltage line and which extends in the first direction, connection lines which connects the data line to a pad in the pad area in the display area, and a conductive layer arranged in a layer between the first voltage line and the data line.

A display apparatus includes: a base substrate; a thin film transistor and a power supply wire on the base substrate; a first electrode on the base substrate, and electrically connected to the thin film transistor; a light emitting layer and a common layer on the first electrode; and a second electrode on the common layer. The power supply wire includes: a first conductive layer; a second conductive layer on the first conductive layer; and a third conductive layer on the second conductive layer. The third conductive layer protrudes more than the second conductive layer on a side surface of the power supply wire, and the second electrode contacts a side surface of the second conductive layer.

A display panel includes a substrate, a first thin film transistor including a first semiconductor layer and a first gate electrode, a data line extending in a first direction, a scan line extending in a second direction, a second thin film transistor electrically connected to the data line and including a second semiconductor layer and a second gate electrode, a third thin film transistor including a third semiconductor layer and a first upper gate electrode arranged on the third semiconductor layer, a node connection line electrically connecting the first thin film transistor and the third thin film transistor, and a shield line located between the data line and the node connection line in a plan view and including the same material as the first upper gate electrode of the third thin film transistor. The first semiconductor layer includes a silicon semiconductor, and the third semiconductor layer includes an oxide semiconductor.

A display device includes a first semiconductor pattern on a substrate, a first insulating layer on the first semiconductor pattern, a first gate electrode on the first insulating layer, a second insulating layer on the first gate electrode, a second semiconductor pattern on the second insulating layer, a material of the second semiconductor pattern being different from that of the first semiconductor pattern, a third insulating layer on the second semiconductor pattern, a second gate electrode on the third insulating layer, a first planarization layer overlapping the second gate electrode, a second planarization layer on the first planarization layer and including a light blocking portion, and a pixel definition layer on the second planarization layer, wherein at least a portion of the pixel definition layer directly contacts the light blocking portion of the second planarization layer.

Provided is a display device. The display device includes: one or more pixels placed in an active area and a pixel circuit associated with the pixels; and a power supply line placed in an inactive area outside the active area and connected to the pixel circuit. At least one side of the power supply line may be covered with an overcoating layer. The overcoating layer includes a first portion adjacent to the side of the power supply line and a second portion which is farther from the power supply line than the first portion. The first portion has a smaller thickness than the second portion. The first portion may be about half the thickness of the second portion.

Provided is a display device. The display device includes: one or more pixels placed in an active area and a pixel circuit associated with the pixels; and a power supply line placed in an inactive area outside the active area and connected to the pixel circuit. At least one side of the power supply line may be covered with an overcoating layer. The overcoating layer includes a first portion adjacent to the side of the power supply line and a second portion which is farther from the power supply line than the first portion. The first portion has a smaller thickness than the second portion. The first portion may be about half the thickness of the second portion.

The present disclosure relates to an array substrate, a manufacturing method thereof, a three-dimensional display panel, and a display device. The array substrate includes a plurality of sub-pixels arranged in an array. Each sub-pixel includes a first composite region and a second composite region alternately arranged, as well as a substrate; a partition portion formed in the second composite region; a pixel electrode including a first composite electrode formed in the first composite region and a second composite electrode formed on the partition portion; an organic light emitting layer formed on a side of the pixel electrode away from the substrate; a pixel defining layer formed on the substrate provided around the organic light emitting layer; a common electrode having a polarity opposite to the pixel electrode formed on a side of organic light emitting layer away from the substrate; and a packaging layer.