A display device may include a first pixel coupled to an emission control line, and an emission control stage for selectively coupling the emission control line to a first or second supply voltage line. The emission control stage may include: a first emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the emission control line, and a main gate electrode coupled to a first node; a second emission control transistor including a first electrode coupled to the emission control line, a second electrode coupled to the second supply voltage line, and a main gate electrode coupled to a second node; and a third emission control transistor including a first electrode coupled to the first supply voltage line, a second electrode coupled to the first node, a main gate electrode coupled to the second node, and a sub-gate electrode.

A stage circuit including: an output circuit for supplying a voltage of a first or second power supply to an output terminal in response to voltages of first and second nodes; an input circuit for controlling voltages of the second node and a third node; a first signal processor for controlling the voltage of the first node; a second signal processor configured to control the voltage of the first node in response to an output voltage of a third signal processor and a signal supplied to a third input terminal; and the third signal processor for controlling the voltage of the second node. The third signal processor includes: a third capacitor coupled between the first power supply and the second node; and a third transistor coupled between the first power supply and the third input terminal, and including a gate electrode coupled to the second node.

A display device includes first and second signal lines, first and second signal pads, and a pad insulating layer overlapping with the first and second signal lines. The first signal pad includes an intermediate conductive pattern overlapping with and connected to an end portion of the first signal line, and an upper conductive pattern on the intermediate conductive pattern, the upper conductive pattern being exposed through the pad insulating layer. The intermediate conductive pattern includes a first portion overlapping with the end portion of the first signal line, and a second portion between the end portion of the first signal line and an end portion of the second signal line and extending from the first portion. The upper conductive pattern is connected to the second portion of the intermediate conductive pattern.

Provided are a display substrate and a display device. The display substrate includes a base substrate, and gate lines extending in a first direction, data lines extending in a second direction and pixel units that are on the base substrate, the first direction intersecting the second direction; each pixel unit including sub-pixels, each sub-pixel including a pixel circuit; the pixel circuit including at least a switching transistor, a drive transistor, a sensing transistor, and a storage capacitor; for each pixel circuit, the switching transistor, the drive transistor, and the sensing transistor therein are all on a same side of the storage capacitor; the switching transistor is at an intersection of the gate line and the data line connected thereto, and the switching transistor is adjacent to the sensing transistor in the first direction and adjacent to the drive transistor in the second direction.

A display panel includes: a base, a first electrode, a pixel definition layer and a first light-emitting functional layer. The first electrode is disposed on a side of the base; the pixel definition layer is disposed on the side of the base, and includes a first hollowed-out portion; the first hollowed-out portion includes a first opening and a second opening arranged oppositely, the first opening is closer to the base than the second opening, and the first opening exposes at least part of the first electrode; and the first light-emitting functional layer is disposed on sides of the pixel definition layer and the first electrode away from the base, and includes a second hollowed-out portion; an orthogonal projection of the second hollowed-out portion on the base is non-overlapping with an orthogonal projection of the first opening on the base.

The present disclosure provides a display substrate, a manufacturing method thereof, and a display device, and relates to the field of display technology. The display substrate includes a display region and a wiring region surrounding the display region. The wiring region includes: a gate line layer including a plurality of signal lines parallel to each other; an insulation layer covering the gate line layer, a groove being formed in the insulation layer at a position corresponding to a gap between adjacent signal lines; a planarization layer at a side of the insulation layer away from the gate line layer; and an active pattern layer at a side of the planarization layer away from the gate line layer.

A display device includes: a first active pattern on a light blocking pattern; a second active pattern at a same layer as that of the first active pattern; a first insulating pattern on the first active pattern; a second insulating pattern on the first active pattern, the second insulating pattern being spaced from the first insulating pattern, and having a first contact hole exposing the first active pattern; a first gate electrode on the first insulating pattern; a second gate electrode at a same layer as that of the first gate electrode, and overlapping with the second active pattern; a first etch stopper on the second insulating pattern, and having a second contact hole connected to the first contact hole; and a first electrode on the first etch stopper, the first electrode contacting the light blocking pattern and the first active pattern through the first and second contact holes.

A display device includes: a first active pattern on a light blocking pattern; a second active pattern at a same layer as that of the first active pattern; a first insulating pattern on the first active pattern; a second insulating pattern on the first active pattern, the second insulating pattern being spaced from the first insulating pattern, and having a first contact hole exposing the first active pattern; a first gate electrode on the first insulating pattern; a second gate electrode at a same layer as that of the first gate electrode, and overlapping with the second active pattern; a first etch stopper on the second insulating pattern, and having a second contact hole connected to the first contact hole; and a first electrode on the first etch stopper, the first electrode contacting the light blocking pattern and the first active pattern through the first and second contact holes.

A display device includes a display panel and an input sensor. The input sensor may include a first sensing electrode, a signal line electrically connected to a first terminal of the first sensing electrode, a first line at least partially overlapping the first sensing electrode and extending in the same direction as the first sensing electrode in the active area, and a first switching element defining a first current path in the first sensing electrode and the first line or blocking the first current path.

A display device includes a display panel and an input sensor. The input sensor may include a first sensing electrode, a signal line electrically connected to a first terminal of the first sensing electrode, a first line at least partially overlapping the first sensing electrode and extending in the same direction as the first sensing electrode in the active area, and a first switching element defining a first current path in the first sensing electrode and the first line or blocking the first current path.