Display devices are disclosed. In one example, a display device includes light emitting element groups each including light emitting element units, each of the light emitting element units including first, second and third light emitting elements. Each of the light emitting element groups includes first drive circuits that drive the first light emitting elements, second drive circuits that drive the second light emitting elements, and third drive circuits that drive the third light emitting elements, and in each of the light emitting element groups, the number of first drive circuits is equal to the number of first light emitting elements, the number of second drive circuits is less than the number of second light emitting elements, and the number of third drive circuits is less than the number of third light emitting elements.

Provided is a display substrate including a base substrate, a plurality of pixel units, at least one first power line, a barrier structure, an adapting structure, a cathode layer and a first organic pattern. By covering at least part of the second side face of the adapting structure with the first organic pattern, the risk of the second side face of the adapting structure being eroded by moisture or oxygen due to the etching defects can be reduced.

A pixel circuit and a display device including the pixel circuit are disclosed. The pixel circuit according to embodiments includes a first pixel circuit connected in parallel to an initialization voltage line to which an initialization voltage is applied, and including a first-first switch element connected to a first-first gate line and a first-second switch element connected to a first-second gate line; and a second pixel circuit connected in parallel to the initialization voltage line, and including a second-first switch element connected to a second-first gate line and a second-second switch element connected to a second-second gate line, and the first-second gate line and the second-first gate line are electrically connected.

A pixel circuit and a display device including the pixel circuit are disclosed. The pixel circuit according to embodiments includes a first pixel circuit connected in parallel to an initialization voltage line to which an initialization voltage is applied, and including a first-first switch element connected to a first-first gate line and a first-second switch element connected to a first-second gate line; and a second pixel circuit connected in parallel to the initialization voltage line, and including a second-first switch element connected to a second-first gate line and a second-second switch element connected to a second-second gate line, and the first-second gate line and the second-first gate line are electrically connected.

A display apparatus includes a base substrate including a display area in which an image is displayed and a peripheral area adjacent to the display area, a source/drain pattern on the base substrate, the source/drain pattern including a connecting electrode in a pad portion of the peripheral area and a electrode of a thin film transistor in the display area, a planarization insulation layer on the base substrate, the planarization insulation layer contacting a side surface of the connecting electrode and a side surface of the electrode of the thin film transistor, and exposing a top surface of the connecting electrode, a connecting member contacting the connecting electrode, and a driving member including a driving circuit, the driving member being connected to the connecting member.

In a transparent display panel, a layer of each of a VSS voltage connection line and a VDD voltage connection line as a power line in a display region is different from a layer of a data line and a reference voltage connection line, while each of the VSS voltage connection line and the VDD voltage connection line partially overlaps the data line and the reference voltage connection line. Thus, an overall width of a line region may be reduced. Thus, an area of a pixel circuit region is reduced, such that an area of a transmissive region increases, thereby to increase an overall transmittance of the panel. Further, a width of each of the VSS voltage connection line and the VDD voltage connection line is large while reducing or minimizing an area of the line region in the display region. This reduces or minimizes occurrence of VDD drop or VSS rise, thereby to reduce luminance non-uniformity of the panel.

A display apparatus including first-through-third pixels sequentially arranged in a row direction, a first shielding electrode arranged between the first pixel and the second pixel, a first voltage line configured to transmit a first initialization voltage, a second voltage line configured to transmit a second initialization voltage, a first contact plug connecting the first pixel and the second pixel to the first voltage line, a second contact plug connecting the second pixel and the third pixel to the second voltage line, and a third contact plug connecting the first shielding electrode to the first voltage line.

A slit has ends each close to one of a display area and a terminal. The ends are each formed of a stepwise side face, including etch stop films.

A slit has ends each close to one of a display area and a terminal. The ends are each formed of a stepwise side face, including etch stop films.

A display panel capable of reducing a width of a bezel of an area around a hole and a display device including the panel are disclosed. The display panel having the hole defined therein includes a first pixel array including source lines and sub-pixels; a bezel defined around the hole and at least one of the source lines of the first pixel array extends in and along the bezel; and a second pixel array including sub-pixels and the at least one source line extending along the bezel and to the second pixel array.