A liquid discharge head includes a pressure chamber that accommodates a liquid, a diaphragm that forms a wall surface of the pressure chamber, and a piezoelectric element that is provided on an opposite side of the pressure chamber with the diaphragm interposed between the piezoelectric element and the pressure chamber and vibrates the diaphragm. The diaphragm includes a silicon oxynitride layer formed with including silicon oxynitride.

A liquid ejecting head includes a flow path forming substrate, a vibration plate that is formed on one surface side of the flow path forming substrate, a first piezoelectric element that is provided on the vibration plate, a second piezoelectric element that is provided on the vibration plate, a protective substrate that is bonded to the one surface side of the flow path forming substrate, a flow path member that is adhered to a side of the protective substrate opposite to the flow path forming substrate via an adhesive, and a drive circuit that is mounted in a space formed so as to be surrounded by the flow path forming substrate, the protective substrate, and the flow path member, in which the flow path member is provided with a hole portion which is open to a region facing the space.

A piezoelectric element 10 includes a lower electrode, constituted of a Pt/Ti laminated film, a PLT seed layer, formed on the lower electrode, a PZT piezoelectric film, formed on the PLT seed layer, and an upper electrode, formed on the PZT piezoelectric film. A curve Q1 is a curve drawn such as to pass through a plurality of plotted points, each expressing a PLT (100) peak intensity with respect to a Pt (111) peak intensity according to a substrate setting temperature during forming of the Pt/Ti laminated film. A relationship of the PLT (100) peak intensity with respect to the Pt (111) peak intensity is within a range in the curve Q1 until the PLT (100) peak intensity decreases by 5% from a peak point P, at which the PLT (100) peak intensity is the maximum, and a (100) orientation rate of PLT constituting the seed layer is not less than 85%.

Provided are a structure including: a substrate; a first layer provided on the substrate; a second layer provided on the first layer; and a third layer provided on the second layer, in which the first layer is a layer containing a compound represented by a chemical formula MIn.sub.2O.sub.4 using M as a metal element, the second layer is a metal layer having a face-centered cubic structure, and the third layer is a ferroelectric film, and a sensor using the structure.

A method for producing a multi-layer electrode system includes providing a carrier substrate having a recess in a top side of the carrier substrate. At least one wall of the recess is inclined in relation to a bottom side of the carrier substrate, which is opposite to the top side. The method also includes applying a multi-layer stack, which includes at least a first electrode layer, a second electrode layer, and a piezoelectric layer arranged between the first electrode layer and the second electrode layer, to the top side of the carrier substrate. At least the wall and a bottom of the recess are covered by at least a portion of the multi-layer stack.

A stacked film is a stacked film including an oxide film, and a metal film provided on the oxide film, in which the oxide film includes a ZrO.sub.2 film of which a main surface is a (001) plane, the metal film includes a Pt film or a Pd film that has a single orientation and of which a main surface is a (001) plane, and a [100] axis of the ZrO.sub.2 film and a [100] axis of the metal film are parallel to an interface between the oxide film and the metal film, and the axes of both are parallel to each other.

A semiconductor device includes a buffer layer formed with a semiconductor adapted to produce piezoelectric polarization, and a channel layer stacked on the buffer layer, wherein a two-dimensional hole gas, generated in the channel layer by piezoelectric polarization of the buffer layer, is used as a carrier of the channel layer. On a complementary semiconductor device, the semiconductor device described above and an n-type field effect transistor are formed on the same compound semiconductor substrate. Also, a level shift circuit is manufactured by using the semiconductor device. Further, a semiconductor device manufacturing method includes forming a compound semiconductor base portion, forming a buffer layer on the base portion, forming a channel layer on the buffer layer, forming a gate on the channel layer, and forming a drain and source with the gate therebetween on the channel layer.

An ultrasonic flow meter comprising two piezoelectric ultrasonic transducers each comprising a first and a second electrode; an ultrasonic flow meter housing, at least a part of which forms a support substrate for supporting the two piezoelectric ultrasonic transducers on an electrically conductive layer of the support substrate; an adhesive applied between the electrically conductive layer and the first electrode; wherein at least the first electrode of each piezoelectric ultrasonic transducer has a roughened surface, and wherein electrical connection between the electrically conductive layer and the first electrode is formed by said roughening.

The disclosure relates to a hybrid structure for a surface-acoustic-wave device comprising a useful layer of piezoelectric material joined to a carrier substrate having a thermal expansion coefficient lower than that of the useful layer; the hybrid structure comprising an intermediate layer located between the useful layer and the carrier substrate, the intermediate layer being a structured layer formed from at least two different materials comprising a plurality of periodic motifs in the plane of the intermediate layer.

Provided is a method of manufacturing a MEMS device including forming, in a metal layer, an opening that enables a first space and a second space to communicate with each other by exposing the metal layer to an etching solution in a state where the metal layer is left at a boundary between the first space and the second space, and covering an inner surface of an opening of each of an adhesive layer and the metal layer by forming a protective layer from an inner surface of the first space to an inner surface of the second space after the opening of the metal layer is formed.