A tunable quantum qubit circuit comprising: a plurality of interconnected Josephson tunneling junctions sculpted in-situ on-chip, wherein each Josephson tunneling junction comprises a pair of high temperature superconductors separated by an active region having a controlled charge density; a capacitive-coupled control gate operatively coupled to the Josephson tunneling junctions and configured to simultaneously modulate energy levels of the Josephson tunneling junctions; and independent control gates operatively coupled to the Josephson tunneling junctions, wherein the independent control gates are reconfigurable on-the-fly by an operator.

A quantum device according to an example embodiment includes a quantum chip 10, and an interposer 20 on which the quantum chip 10 is mounted, in which the interposer 20 includes a conductive wiring line CL1 electrically connected to the quantum chip 10, a mounting surface 21 of the interposer 20 on which the quantum chip 10 is mounted or an opposite surface 22 opposite to the mounting surface 21 includes a first area AR11 and a second area AR12 different from the first area AR11 as viewed in a direction perpendicular to the mounting surface 21 or the opposite surface 22, the conductive wiring line CL1 is disposed in the first area AR11 on the mounting surface 21 or the opposite surface 22, and a movable member 60 is in contact with the second area AR12 of the interposer 20.

According to various implementations of the invention, a vertical Josephson Junction device may be realized using molecular beam epitaxy (MBE) growth of YBCO and PBCO epitaxial layers in an a-axis crystal orientation. Various implementations of the invention provide improved vertical JJ devices using SiC or LSGO substrates; GaN, AlN, or MgO buffer layers; YBCO or LSGO template layers; YBCO conductive layers and various combinations of barrier layers that include PBCO, NBCO, and DBCO. Such JJ devices are simple to fabricate with wet and dry etching, and allow for superior current flow across the barrier layers.

Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.

An electric circuit includes one or more photon detector components and a superconducting logic gate component coupled to respective outputs of the one or more photon detector components. The electric circuit further includes a bias source electrically coupled to the superconducting logic gate component, the bias source configured to provide a bias current adapted to cause the superconducting logic gate component to function as a logical gate. The electric circuit also includes an optical switch component electrically coupled to an output of the superconducting logic gate component.

An electric circuit includes a plurality of superconducting components, each of the plurality of superconducting components having: a respective first terminal; a respective second terminal; and a respective input. The electric circuit further includes a bias current source electrically-connected to the respective first terminal of each of the plurality of superconducting components. The bias current source is configured to provide a bias current adapted to cause the electric circuit to function as a logical OR gate on the respective inputs of the plurality of superconducting components. The electric circuit further includes an output node adapted to output a state of the logical OR gate.

A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.

Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.

A quantum device according to an example embodiment includes a quantum chip 10, and an interposer 20 on which the quantum chip 10 is mounted, in which the interposer 20 includes a conductive wiring line CL1 electrically connected to the quantum chip 10, a mounting surface 21 of the interposer 20 on which the quantum chip 10 is mounted or an opposite surface 22 opposite to the mounting surface 21 includes a first area AR11 and a second area AR12 different from the first area AR11 as viewed in a direction perpendicular to the mounting surface 21 or the opposite surface 22, the conductive wiring line CL1 is disposed in the first area AR11 on the mounting surface 21 or the opposite surface 22, and a movable member 60 is in contact with the second area AR12 of the interposer 20.

A physical vapor deposition system includes a chamber, three target supports to targets, a movable shield positioned having an opening therethrough, a workpiece support to hold a workpiece in the chamber, a gas supply to deliver nitrogen gas and an inert gas to the chamber, a power source, and a controller. The controller is configured to move the shield to position the opening adjacent each target in turn, and at each target cause the power source to apply power sufficient to ignite a plasma in the chamber to cause deposition of a buffer layer, a device layer of a first material that is a metal nitride suitable for use as a superconductor at temperatures above 8° K on the buffer layer, and a capping layer, respectively.