H10N60/855

Superconducting three-terminal device and logic gates

A three-terminal device that exhibits transistor-like functionality at cryogenic temperatures may be formed from a single layer of superconducting material. A main current-carrying channel of the device may be toggled between superconducting and normal conduction states by applying a control signal to a control terminal of the device. Critical-current suppression and device geometry are used to propagate a normal-conduction hotspot from a gate constriction across and along a portion of the main current-carrying channel. The three-terminal device may be used in various superconducting signal-processing circuitry.

Reducing parasitic capacitance in a qubit system
12069969 · 2024-08-20 · ·

A system that includes: an array of qubits, each qubit of the array of qubits comprising a first electrode corresponding to a first node and a second electrode corresponding to a second node, wherein, for a first qubit in the array of qubits, the first qubit is positioned relative to a second qubit in the array of qubits such that a charge present on the first qubit induces a same charge on each of the first node of the second qubit and the second node of the second qubit, such that coupling between the first qubit and the second qubit is reduced, and wherein none of the nodes share a common ground is disclosed.

MgB2-based superconducting wire for a liquid hydrogen level sensor, a liquid hydrogen level sensor, and a liquid hydrogen level gauge

An MgB.sub.2-based superconducting wire for a liquid hydrogen fluid level sensor which can maintain an unimmersed portion of the MgB.sub.2-based superconducting wire for a liquid hydrogen fluid level sensor in a non-superconducting state even without heating the unimmersed portion is provided. A wire for a liquid hydrogen fluid level sensor comprises an MgB.sub.2-based superconductor which contains Mg, B, and Al. The critical temperature at which the electrical resistance becomes essentially zero is 20-25 K, and the transition width, which is the difference between the temperature at which the electrical resistance begins to decrease toward zero and the critical temperature, is at most 5 K.

LAMINATE AND THERMOELECTRIC CONVERSION ELEMENT

A laminate includes, on a substrate, a first buffer layer substantially made of zirconium oxide or stabilized zirconia, a second buffer layer substantially made of yttrium oxide, a metal layer substantially made of at least one among platinum, iridium, palladium, rhodium, vanadium, chromium, iron, molybdenum, tungsten, aluminum, silver, gold, copper, and nickel, and a magnesium oxide layer substantially made of magnesium oxide, in this order.

ROOM-TEMPERATURE AND AMBIENT-PRESSURE SUPERCONDUCTING CERAMIC AND METHODS FOR PRODUCING THE SAME

Disclosed are a superconducting ceramic and methods for producing the same. The superconducting ceramic is represented by Formula 1, which is described in the specification. The methods are suitable for producing the superconducting ceramic. The superconducting ceramic exhibits superconductivity at room temperature and ambient pressure.

DISTRIBUTED NANOWIRE SENSOR FOR SINGLE PHOTON IMAGING

An integrated, superconducting imaging sensor may be formed from a single, meandering nanowire. The sensor is capable of single-photon (or single-event) detection and imaging with ?10 micron spatial resolution and sub-100-picosecond temporal resolution. The sensor may be readily scaled to large areas.

Oxide superconductor and method for manufacturing same
12156483 · 2024-11-26 · ·

An oxide superconductor of an embodiment includes an oxide superconducting layer including at least one superconducting region containing barium (Ba), copper (Cu) and a first rare earth element, having a continuous perovskite structure, and having a size of 100 nm100 nm100 nm or more, and a non-superconducting region in contact with the at least one superconducting region, containing praseodymium (Pr), barium (Ba), copper (Cu), and a second rare earth element, having a ratio of a number of atoms of the praseodymium (Pr) to a sum of a number of atoms of the second rare earth element and the number of atoms of the praseodymium (Pr) being 20% or more, having a continuous perovskite structure continuous with the continuous perovskite structure of the superconducting region, and having a size of 100 nm100 nm100 nm or more.

LOW-COST AND HIGH-STRENGTH Bi-BASED SUPERCONDUCTING WIRE/TAPE AND PREPARATION METHOD THEREOF

A low-cost and high-strength Bi-based superconducting wire/tape and a preparation method thereof, the preparation method includes: 1. subjecting a first Bi-based superconducting wire/tape to electrochemical silver reduction to remove a Ag alloy layer to obtain a second Bi-based superconducting wire/tape; and 2. subjecting the second Bi-based superconducting wire/tape to surface enhancement, such that a Cu layer is formed to obtain the low-cost and high-strength Bi-based superconducting wire/tape. An electrochemical silver reduction technology combines with an electrochemical additive method to remove a Ag alloy layer on a surface of a Bi-based superconducting wire/tape and coat a high-strength Cu layer, such that a low-cost and high-strength Bi-based superconducting wire/tape can be prepared, which reduces a preparation cost and improves a strength of a Bi-based superconducting wire/tape to meet the application requirements of large super-strong magnets.

Tunable Josephson junction oscillator
12144265 · 2024-11-12 · ·

A tunable oscillator including a Josephson junction. In some embodiments, the tunable oscillator includes a first superconducting terminal, a second superconducting terminal, a graphene channel including a portion of a graphene sheet, and a conductive gate. The first superconducting terminal, the second superconducting terminal, and the graphene channel together may form a Josephson junction having an oscillation frequency, and the conductive gate may be configured, upon application of a voltage across the conductive gate and the graphene channel, to modify the oscillation frequency.

HIGH DENSITY CROSS POINT RESISTIVE MEMORY STRUCTURES AND METHODS FOR FABRICATING THE SAME
20180090543 · 2018-03-29 ·

High density resistive memory structures, integrate circuits with high density resistive memory structures, and methods for fabricating high density resistive memory structures are provided. In an embodiment, a high density resistive memory structure includes a semiconductor substrate and a plurality of first electrodes in a first plane in and/or over the semiconductor substrate. Further, the high density resistive memory structure includes a plurality of second electrodes in a second plane in and/or over the semiconductor substrate. The second plane is parallel to the first plane, and each second electrode in the plurality of second electrodes crosses over or under each first electrode in the plurality of first electrodes at a series of cross points. Each second electrode in the plurality of second electrodes is non-linear and the series of cross points formed by each respective second electrode is non-linear.