Lateral programmable metallization cells may comprise a solid electrolyte layer, an anode coupled to the solid electrolyte layer, and a cathode coupled to the solid electrolyte layer. Exemplary solid electrolyte layers may comprise a first layer comprising an oxide electrolyte and a copper species and a second layer comprising at least one copper species, the second layer coupled to the first layer.

The objective of the present invention is to make it possible to manufacture, with a high yield, a metal deposition type variable-resistance element with which variability of a program voltage and a leakage current under a high resistance state is reduced, while the program voltage is reduced. This variable-resistance element comprises: a first electrode which is embedded in a first insulating film and which supplies metal ions, an upper surface of the first electrode being exposed out of the first insulating film by means of an opening portion in a second insulating film covering the first insulating film; a metal deposition type variable-resistance film which covers the opening portion and is in contact with the upper surface of the first electrode; and a second electrode in contact with the upper surface of the variable-resistance film. The width of the opening portion is greater than the width of the upper surface of the first electrode, and the edge portions of the opening portion are provided in such a way that there is a margin between the edge portions of the opening portion and the edge portions of the upper surface of the first electrode which face the edge portions of the opening portion.

In an example, an apparatus includes an electrically conductive component having a first side and a second side, a first switching material formed on the first side of the electrically conductive component, and a second switching material formed on the second side of the electrically conductive component. The second switching material may include a different material than the first switching material and resistance states of each of the first switching material and the second switching material are to be modified through application of electric fields through the first switching material and the second switching material. The apparatus may also include an electrode in contact with one of the first switching material and the second switching material.

A method for manufacturing resistive random access memories, each resistive random access memory including first and second electrodes separated by a layer of active material, the method including producing connector elements with a step Cp along a first direction, each connector element having a width Cb along the first direction; producing a plurality of first electrodes with a step Ep along the first direction, each first electrode having a first end surface and a second end surface, the second end surface having a width Eb along the first direction and an area greater than the area of the first end surface; wherein: 0<Ep−Eb≦Cp−Cb and:Eb<Cp−Cb such that, for each connector element, a first electrode is in contact, via its second end surface, with the connector element, and each first electrode is only in contact, via its second end surface, with at the most one connector element.

An example memristor includes a first conductive layer, a switching layer, and a second conductive layer. The first conductive layer may include a first conductive material and a second conductive material. The second conductive material may have a higher diffusivity than the first conductive material. The switching layer may be coupled to the first conductive layer and may include a first oxide having the first conductive material and a second oxide having the second conductive material. The second conductive layer may be coupled to the switching layer.

A RRAM and a method for fabricating the same, wherein the RRAM comprises: a bottom electrode; an oxide layer containing a bottom electrode metal, disposed on the bottom electrode; a resistance-switching layer, disposed on the oxide layer containing a bottom electrode metal, wherein the resistance-switching layer material is a nitrogen-containing tantalum oxide; an inserting layer, disposed on the resistance-switching layer, wherein the inserting layer material comprises a metal or a semiconductor; a top electrode, disposed on the inserting layer. By providing the to resistance-switching layer with a nitrogen-containing tantalum oxide, compared with Ta.sub.2O.sub.5, the RRAM of the present disclosure has a low activation voltage and a high on-off ratio, and can enhance the control capability over the device resistance by the number of oxygen vacancies.

The present disclosure generally relates to structures, memory devices, and a method of forming the same. The structures and the memory devices may include a first electrode, a first oxygen scavenging layer disposed upon the first electrode, a resistive layer disposed upon the first oxygen scavenging layer, a second oxygen scavenging layer disposed upon the resistive layer, and a second electrode disposed upon the second oxygen scavenging layer. The structures and the memory devices may reduce the switching voltage or switching current for bidirectional switching of the resistive layer.

A resistive memory array includes a plurality of resistive memory devices. A sneak path current in the resistive memory array is reduced when a negative temperature coefficient of resistance material is incorporated in series with a negative differential resistance selector that is in series with a memristor switching material at a junction formed at a cross-point between two conductors of one of the plurality of resistive memory devices.

A method for fabricating a memory device is provided. The method includes forming a bottom electrode layer over a substrate; forming a buffer layer over the bottom electrode layer; performing a surface treatment to a top surface of the buffer layer; depositing a resistance switch layer over the top surface of the buffer layer after performing the surface treatment; forming a top electrode over the resistance switch layer; and patterning the resistance switch layer into a resistance switch element below the top electrode.

The invention provides a semiconductor structure, the semiconductor structure includes a substrate, a resistance random access memory on the substrate, an upper electrode, a lower electrode and a resistance conversion layer between the upper electrode and the lower electrode, and a cap layer covering the outer side of the resistance random access memory, the cap layer has an upper half and a lower half, and the upper half and the lower half contain different stresses.