A semiconductor device may include: a first conductive line; a second conductive line disposed over the first conductive line to be spaced apart from the first conductive line; a variable resistance layer disposed over the first conductive line and below the second conductive line; at least one of a first dielectric layer or a second dielectric layer; at least one of a first contact or a second contact; and at least one of a first doped selector layer or a second doped selector layer.

A continuous thin film comprises a metal chalcogenide, wherein the metal is selected from the periodic groups 13 or 14 and the chalcogen is: sulphur (S), selenide (Se), or tellurium (Te), and wherein the thin film has a thickness of less than 20 mm. Methods of forming the continuous thin film involve thermally evaporating precursors to form a thin film on the surface of a substrate. In a particular embodiment, molecular beam epitaxy (MBE) is used to grow indium selenide (In2Se3) thin film from two precursors (In2Se3 and Se) and the thin film is used to fabricate a ferroelectric resistive memory device.

There are provided a variable resistance memory device and a manufacturing method of the same. The variable resistance memory device includes: a first electrode; a second electrode arranged in a vertical direction from the first electrode; and an oxide layer having an oxygen deficient region extending in the vertical direction between the second electrode and the first electrode.

A semiconductor device includes a substrate, a stack, a conductive pillar, a memory layer, and a salicide layer. The stack is disposed on the substrate, wherein the stack includes a plurality of insulating layers and a plurality of conductive layers that are alternately stacked along a first direction. The conductive pillar penetrates the stack along the first direction. The memory layer surrounds the conductive pillar. The salicide layer surrounds the conductive pillar, wherein the memory layer is disposed between the conductive pillar and the salicide layer.

A method for fabricating memory device includes: providing a substrate having a bottom electrode layer therein, forming a buffer layer and a mask layer on the buffer layer over the substrate, in contact with the bottom electrode layer, performing an advanced oxidation process on a sidewall of the buffer layer to form a resistive layer, which surrounds the whole sidewall of the buffer layer and extends upward vertically from the substrate, and forming, over the substrate, a noble metal layer and a top electrode layer on the noble metal layer, fully covering the resistive layer and the mask layer.

A semiconductor device includes a substrate, a stack, a conductive pillar, a memory layer, and a salicide layer. The stack is disposed on the substrate, wherein the stack includes a plurality of insulating layers and a plurality of conductive layers that are alternately stacked along a first direction. The conductive pillar penetrates the stack along the first direction. The memory layer surrounds the conductive pillar. The salicide layer surrounds the conductive pillar, wherein the memory layer is disposed between the conductive pillar and the salicide layer.

There are provided a variable resistance memory device and a manufacturing method of the same. The variable resistance memory device includes: a first electrode; a second electrode arranged in a vertical direction from the first electrode; and an oxide layer having an oxygen deficient region extending in the vertical direction between the second electrode and the first electrode.

An resistive switch having a first platinum layer, an electrolyte layer that is formed by extrusion based additive manufacturing, a silver layer, and a second platinum layer, and methods of manufacturing and using the resistive switch.

An example method includes: forming a bottom electrode on a substrate and forming a patterned mask layer on the bottom electrode; thermal oxidizing the bottom electrode layer via the patterned mask layer by applying a thermal process and a first plasma; removing a gaseous status of the bottom electrode oxide using a first vacuum purge; removing a solid status of the bottom electrode oxide by applying a second plasma; removing the gaseous status and the solid status of the bottom electrode oxide using a second vacuum purge to form a patterned bottom electrode; removing the patterned mask layer; forming a filament forming layer on the patterned bottom electrode; and a top electrode on the filament forming layer. The filament forming layer is configured to form a filament within the filament forming layer responsive to a switching voltage being applied to the filament forming layer.

The present invention relates to a structure of a memory device. The structure of a memory device includes a substrate, including a bottom electrode layer formed therein. A buffer layer is disposed on the substrate, in contact with the bottom electrode layer. A resistive layer surrounds a whole sidewall of the buffer layer, and extends upward vertically from the substrate. A mask layer is disposed on the buffer layer and the resistive layer. A noble metal layer is over the substrate, and fully covers the resistive layer and the mask layer. A top electrode layer is disposed on the noble metal layer.