A re-writeable non-volatile memory device including a re-writeable non-volatile two-terminal memory element (ME) having tantalum. The ME including a first terminal, a second terminal, a first layer of a conductive metal oxide (CMO), and a second layer in direct contact with the first layer. The second layer and the first layer being operative to store at least one-bit of data as a plurality of resistive states, and the first and second layer are electrically in series with each other and with the first and second terminals.

The present disclosure, in some embodiments, relates to a memory device. The memory device includes a dielectric protection layer having sidewalls defining an opening over a conductive interconnect within an inter-level dielectric (ILD) layer. A bottom electrode structure extends from within the opening to directly over the dielectric protection layer. A variable resistance layer is over the bottom electrode structure and a top electrode is over the variable resistance layer. A top electrode via is disposed on the top electrode and directly over the dielectric protection layer.

Technologies relating to one-selector-one-memristor (1S1R) crossbar array circuits methods for reducing 1S1R cell-to-cell switch variations are disclosed. An example apparatus includes: a bottom electrode; a filament forming layer formed on the bottom electrode; an oxidized filament forming layer; a channel forming layer formed on the filament forming layer; an oxidized filament forming layer; a top electrode formed on the channel forming layer, wherein the filament forming layer is configured to form a filament within the filament forming layer, the channel forming layer is configured to form a channel within the channel forming layer when applying a switching voltage upon the filament forming layer and the channel forming layer, and wherein the filament forming layer is surrounded by the oxidized filament forming layer and the channel forming layer is surrounded by the oxidized channel forming layer.

A resistive switching memory cell comprising a switchable solid electrolyte (E). The electrolyte (E) consists of a composition comprising a matrix comprising a metal oxide, metal sulphide and/or metal selenide as the matrix material, the metal oxide, metal sulphide and/or metal selenide comprising at least two metals M1 and M2, and a metal M3 which is mobile in the matrix. The atomic ratio of M1 to M2 is within the range of 75:25 to 99.99:0.01, preferably 90:10 to 99.99:0.01; the valence states of M1, M2 and M3 are all positive; the valence state of M1 is larger than the valence state of M2; the valence state of M2 is equal to or larger than the valence state of M3; and the metals M1, M2 and M3 are different.

A method of forming a memory device that includes depositing a first dielectric material within a trench of composed of a second dielectric material; positioning a nanotube within the trench using chemical recognition to the first dielectric material; depositing a dielectric for cation transportation within the trench on the nanotube; and forming a second electrode on the dielectric for cation transportation, wherein the second electrode is composed of a metal.

The present disclosure, in some embodiments, relates to a memory device. The memory device includes a bottom electrode via and a bottom electrode over a top of the bottom electrode via. A data storage layer is over the bottom electrode and a top electrode is over the data storage layer. A top electrode via is on an upper surface of the top electrode and is centered along a first line that is laterally offset from a second line centered upon a bottommost surface of the bottom electrode via. The first line is perpendicular to the upper surface of the top electrode and parallel to the second line.

Embodiments of the invention are directed to a vertical resistive device. A non-limiting example of the vertical resistive device includes a conductive horizontal electrode, an opening extending through the horizontal electrode, a filament region positioned within the opening and communicatively coupled to a sidewall of the horizontal electrode, and a conductive vertical electrode positioned within the opening and communicatively coupled to the filament region. The vertical electrode includes a first conductive alloy material. Oxygen vacancy formation in the filament region is controlled by the first conductive alloy material of the vertical electrode. A room temperature resistivity of the first conductive alloy material is below about 510.sup.8 ohm meters and controlled by at least one of the metals that form the first conductive alloy material.

A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

To provide enhanced data storage devices and systems, various systems, architectures, apparatuses, and methods, are provided herein. In a first example, a resistive memory device is provided. The resistive memory device includes an active region having resistance properties that can be modified to store one or more data bits in the resistive memory device, and at least one sidewall portion of the active region comprising a dopant configured to suppress conductance paths in the active region proximate to the at least one sidewall portion. The resistive memory device includes terminals configured to couple the active region to associated electrical contacts.

A method of forming a memory device that includes depositing a first dielectric material within a trench of composed of a second dielectric material; positioning a nanotube within the trench using chemical recognition to the first dielectric material; depositing a dielectric for cation transportation within the trench on the nanotube; and forming a second electrode on the dielectric for cation transportation, wherein the second electrode is composed of a metal.