Resistive memory devices are provided which are configured to mitigate resistance drift. A device comprises a phase-change element, a resistive liner, a first electrode, a second electrode, and a third electrode. The resistive liner is disposed in contact with a first surface of the phase-change element. The first electrode is coupled to a first end portion of the resistive liner. The second electrode is coupled to a second end portion of the resistive liner. The third electrode is coupled to the first surface of the phase-change element.

Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.

Resistive switching devices that contain lithium, including resistive switching devices containing a lithium titanate, and associated systems and methods are generally described. In some cases, the resistive switching device contains a lithium titanate-containing domain, a first electrode, and a second electrode. In some cases, the application of an electrical potential to the resistive switching device causes a change in resistance state of the lithium titanate-containing domain. The resistive switching devices described herein may be useful as memristors, and in applications that include Resistive-random access memory and neuromorphic computing.

2D heterostructures comprising Bi.sub.2Se.sub.3/MoS.sub.2, Bi.sub.2Se.sub.3/MoSe.sub.2, Bi.sub.2Se.sub.3/WS.sub.2, Bi.sub.2Se.sub.3/MoSe.sub.2. .sub.2xS.sub.2x, or mixtures thereof in which oxygen is intercalated between the layers at selected positions provide high density storage devices, sensors, and display devices. The properties of the 2D heterostructures can be configured utilizing abeam of electromagnetic waves or particles in an oxygen controlled atmosphere.

The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.

An embodiment phase-change memory device includes a memory array provided with a plurality of phase-change memory cells, each having a body made of phase-change material and a first state, in which the phase-change material is completely in an amorphous phase, and at least one second state, in which the phase-change material is partially in the amorphous phase and partially in a crystalline phase. A programming-pulse generator applies to the memory cells rectangular dynamic-programming pulses having an amplitude and a duration calibrated for switching the memory cells from the first state to the second state.

The present disclosure provides a semiconductor chip including a functional area, a first end, a second end, a third end, and a connecting portion. The functional area has first and second sides opposite to each other. The first end is disposed on the first side and the third end is disposed on the first side, wherein the semiconductor chip is switched on or off according to the drive signal received between the third end and the first end, and the connecting portion is disposed on the first side of the functional area and connected to the first end and the third end, wherein when the temperature rises above the a first temperature, the connecting portion is in a conductive state, and when the temperature drops to be not higher than a third temperature, the connecting portion is in an insulated state.

A resistance change device of an embodiment includes: a first electrode; a second electrode; and a stack disposed between these electrodes, and including a first layer containing a resistance change material and a second layer in contact with the first layer. The resistance change material contains at least one of a first element such as Ge and a second element such as Sb, and at least one third element selected from Te, Se, S, and O. The second layer contains a crystal material containing at least one selected from a group consisting of a first material having a composition represented by (Ti,Zr,Hf)CoSb, (Zr,Hf)NiSn, or Fe(Nb,Zr,Hf)(Sb,Sn), a second material having a composition represented by Fe(V,Hf,W)(Al,Si), and a third material having a composition represented by Mg(Si,Ge,Sn).

Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.

Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.