A phase change memory and a method of fabricating the same are provided. The phase change memory includes a lower electrode, an annular heater, an annular phase change layer, and an upper electrode. The annular heater is disposed over the lower electrode. The annular phase change layer is disposed over the annular heater, and the annular phase change layer and the annular heater are misaligned in a normal direction of the lower electrode. The upper electrode is disposed over the annular phase change layer. The present disclosure simplifies the manufacturing process of the phase change memory, reduces the manufacturing cost, and improves the manufacturing yield. In addition, a contact surface between the heater and the phase change layer of the phase change memory of the present disclosure is very small, so that the phase change memory has an extremely low reset current.

Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for a first period of time. The first temperature is configured to promote nucleation of a crystalline state of the PM. The control logic can increase the temperature to a second temperature for a second period of time. The second temperature is configured to promote crystal growth within the PM. The nucleation and growth of the crystal set the PM to the crystalline state. The multistage ramping up of the temperature can improve the efficiency of the set process relative to traditional approaches.

A new liner structure for improving memory cell design is disclosed that incorporates a boron nitride dielectric layer. An example memory device includes an array of memory cells with each of at least some of the memory cells having a stack of layers, the stack comprising at least one phase change layer. A dielectric layer is provisioned over one or more sidewalls of at least the phase change layer. The dielectric layer comprises both nitrogen and boron. The dielectric layer may be part of a liner structure that includes multiple layers, such as an alternating layer stack of boron nitride and silicon nitride. The dielectric layer can be deposited at low temperature (e.g., less than about 300 C.) while maintaining a low hydrogen content and a relatively high thermal conductivity.

A radio frequency (RF) switch includes a phase-change material (PCM), a heating element underlying an active segment of the PCM and extending outward and transverse to the PCM, a capacitive RF terminal, and an ohmic RF terminal. The capacitive RF terminal can include a first trench metal liner situated on a first passive segment of the PCM, and a dielectric liner separating the first trench metal liner from a first trench metal plug. The ohmic RF terminal can include a second trench metal liner situated on a second passive segment of the PCM, and a second trench metal plug ohmically connected to the second trench metal liner. Alternatively, the capacitive RF terminal and the ohmic RF terminal can include lower metal portions and upper metal portions. A MIM capacitor can be formed by the upper metal portion of the capacitive RF terminal, an insulator, and a patterned top plate.

A rapid testing read out integrated circuit (ROIC) includes phase-change material (PCM) radio frequency (RF) switches residing on an application specific integrated circuit (ASIC). Each PCM RF switch includes a PCM and a heating element transverse to the PCM. The ASIC is configured to provide amorphizing and crystallizing electrical pulses to a selected PCM RF switch. The ASIC is also configured to determine if the selected PCM RF switch is in an OFF state or in an ON state. In one implementation, a testing method using the ASIC is disclosed.

A radio frequency (RF) switch includes a phase-change material (PCM), a heating element underlying an active segment of the PCM and extending outward and transverse to the PCM, and RF terminals having lower metal portions and upper metal portions. At least one of the lower metal portions can be ohmically separated from and capacitively coupled to passive segments of the PCM, while the upper metal portions are ohmically connected to the lower metal portions. Alternatively, the lower metal portions can be ohmically connected to passive segments of the PCM, while a capacitor is formed in part by at least one of the upper metal portions. Alternatively, at least one of the RF terminals can have a trench metal liner separated from a trench metal plug by a dielectric liner. The trench metal liner can be ohmically connected to passive segments of the PCM, while the trench metal plug is ohmically separated from, but capacitively coupled to, the trench metal liner.

In a method for wafer-to-wafer bonding, an integrated circuit (IC) wafer and a phase-change material (PCM) switch wafer are provided. The IC includes at least one active device, and has an IC substrate side and a metallization side. The PCM switch wafer has a heat spreading side and a radio frequency (RF) terminal side. A heat spreader is formed in the PCM switch wafer. In one approach, the heat spreading side of the PCM switch wafer is bonded to the metallization side of the IC wafer, then a heating element is formed between the heat spreader and a PCM in the PCM switch wafer. In another approach, a heating element is formed between the heat spreader and a PCM in the PCM switch wafer, then the RF terminal side of the PCM switch wafer is bonded to the metallization side of the IC wafer.

A semiconductor structure includes a semiconductor mesa situated on a semiconductor substrate, a trap-rich region comprising polycrystalline silicon adjacent to the semiconductor mesa, and a phase-change material (PCM) radio frequency (RF) switch. A heating element of the PCM RF switch is situated over the semiconductor mesa. An interconnect segment coupled to the PCM RF switch is situated over the trap-rich region. Alternatively, a semiconductor structure can include a trap-rich region adjacent to a single crystal region of the semiconductor substrate, where the trap-rich region is formed by implant damaging, and where the heating element of the PCM RF switch is situated over the single crystal region.

Method(s) and apparatuses for forming a phase change memory. A method includes: forming a crystalline phase-change layer at a first position in along a surface of a first semiconductor layer, and forming an amorphous phase-change layer at a second position along the surface of a second semiconductor layer, wherein the crystalline phase-change layer and the amorphous phase-change layer are in contact.

Systems and methods are provided for protecting a temperature sensitive object. A system includes a temperature sensitive object and a thermal control material in thermal communication with the temperature sensitive object. The thermal control material has an emissivity that varies as a function of temperature, and includes a substrate comprising a first surface comprising one of a photonic crystal, a metamaterial, a metasurface, and a multilayer film, a solid state phase change material in contact with the surface, and a reflective thin film material at one of a second surface of the substrate, at a surface of the solid state phase change material, and on an opposite side of an optical cavity from the substrate.