Embodiments of the present invention include a phase change memory (PCM) array. The PCM array may include a plurality of PCM cells. Each PCM cell in the plurality of PCM cells may include a top electrode, a resistive element, and a bottom electrode. The PCM array may also include a global heater surrounding the plurality of PCM cells having a thermally conductive material contacting each of the plurality of PCM cells. The global heater may be configured to receive an electric signal to heat the plurality of PCM cells simultaneously.

A method for producing a memory device includes depositing a second interlayer insulating film on a substrate, forming contact holes, and depositing a second metal and a nitride film. The second metal and the nitride film are removed to form pillar-shaped nitride layers, and to form lower electrodes surrounding the pillar-shaped nitride layers. The second interlayer insulating film is etched back to expose upper portions of the lower electrodes. The upper portions of the lower electrodes surrounding the pillar-shaped nitride film are removed and a phase change film is deposited to surround the pillar-shaped nitride film and connect with the lower electrodes. The phase change film is etched on upper portions of the pillar-shaped nitride film, and a reset gate insulating film is formed surrounding the phase change film and forming a reset gate having a side wall shape and remaining on the upper portions of the pillar-shaped nitride film.

A method for producing a memory device and semiconductor device includes forming pillar-shaped phase change layers and lower electrodes in two or more rows and two or more columns on a semiconductor substrate. A reset gate insulating film is formed that surrounds the pillar-shaped phase change layers and the lower electrodes, and a reset gate is formed that surrounds the pillar-shaped phase change layers that function as memory devices arranged in two or more rows and two or more columns.

A reactive material erasure element comprising a reactive material is located between PCM cells and is in close proximity to the PCM cells. The reaction of the reactive material is trigger by a current applied by a bottom electrode which has a small contact area with the reactive material erasure element, thereby providing a high current density in the reactive material erasure element to ignite the reaction of the reactive material. Due to the close proximity of the PCM cells and the reactive material erasure element, the heat generated from the reaction of the reactive material can be effectively directed to the PCM cells to cause phase transformation of phase change material elements in the PCM cells, which in turn erases data stored in the PCM cells.

A method of fabricating a fin selector with a gated RRAM and the resulting device are disclosed. Embodiments include forming a bottom electrode layer and a hardmask on a semiconductor substrate; etching the hardmask, bottom electrode layer, and semiconductor substrate to form a fin-like structure; forming first and second dummy gate stacks on first and second side surfaces of the fin-like structure, respectively; forming spacers on vertical surfaces of the first and second dummy gate stacks; forming an ILD surrounding the spacers; removing the first and second dummy gate stacks, forming first and second cavities on first and second sides of the fin-like structure; forming an RRAM layer on the first and second side surfaces of the fin-like structure in the first and second cavities, respectively; and filling each of the first and second cavities with a top electrode.

A fast erasing memristor includes an active region, a resistive heater, and a dielectric sheath. The active region has a switching layer coupled between a first conducting layer and second conducting layer. The resistive heater is coupled to the active region to provide heat to the active region. The dielectric sheath separates the active region and the resistive heater.

A method for producing a device includes depositing a lower electrode metal and a film whose resistance changes. The film whose resistance changes and the lower electrode metal are etched to form a pillar-shaped phase-change layer and a lower electrode. A reset gate insulating film and a reset gate metal are deposited and etched to form reset gates.

An arming switch structure and method of operation. The arming switch is integrated with a reactive material erasure device and phase change memory cell array and is coupled to a tamper detection device configured to trigger a signal for conduction to the reactive material erasure device that generates heat and induces a phase change in the phase change memory cell array. Prior to packaging, the memory chip is “armed” in a high-resistance state to prevent conduction of any signal to the reactive material erasure device. After the memory chip is packaged, the Reactive Material can be “disarmed” at a chosen time or condition by applying a bias to the arming switch activation layer, thereby heating and crystallizing the arming switch material, placing it in a low resistance state. In the disarmed state, the arming switch may conduct the trigger signal from tamper detection device to the reactive material erasure device.

A resistive random access memory is provided to solve the problem of low switching speed of the conventional resistive random access memory. The resistive random access memory may include a thermally conductive layer, a first electrode layer, a heat preserving element, a resistance changing layer and a second electrode layer. The first electrode layer is arranged on the thermally conductive layer. The heat preserving element is arranged on the first electrode layer and forms a through-hole. A part of a surface of the first electrode layer is exposed to the through-hole. The resistance changing layer extends from the part of the surface of the first electrode layer to a surface of the heat preserving element that is located outside the through-hole. The second electrode layer is arranged on the resistance changing layer.

Discloses is an electronic device and a method for its operation. The device has first and second electrodes and an active material. The active material has selectable and stable first and second macroscopic quantum states, such as charge density wave ordered states, having respectively first and second values of electrical resistivity ρ.sub.1 and ρ.sub.2 at the same temperature. ρ.sub.1 is at least 2 times ρ.sub.2. The method includes the step of switching between the first and second macroscopic quantum states by injection of current via the electrodes.