Patent classifications
H01F10/3259
Method of fabricating magnetic memory device
A method for forming a magnetic memory device is disclosed. At least one magnetic tunneling junction (MTJ) stack is formed on the substrate. The MTJ stack comprises a reference layer, a tunnel barrier layer and a free layer. A top electrode layer is formed on the MTJ stack. A patterned sacrificial layer is formed on the top electrode layer. The MTJ stack is then subjected to a MTJ patterning process in a high-density plasma chemical vapor deposition (HDPCVD) chamber, thereby sputtering off the MTJ stack not covered by the patterned sacrificial layer. During the MTJ patterning process, sidewalls of layers or sub-layers of the MTJ stack are simultaneously passivated in the HDPCVD chamber by depositing a sidewall protection layer.
Bidirectional selector device for memory applications
The present invention is directed to a magnetic memory cell including a magnetic tunnel junction (MTJ) memory element and a two-terminal bidirectional selector coupled in series between two conductive lines. The MTJ memory element includes a magnetic free layer, a magnetic reference layer, and an insulating tunnel junction layer interposed therebetween. The two-terminal bidirectional selector includes bottom and top electrodes, first and third volatile switching layers interposed between the bottom and top electrodes, and a second volatile switching layer interposed between the first and third volatile switching layers. The bottom and top electrodes each independently include one of titanium nitride or iridium. The first and third volatile switching layers each include tantalum oxide and silver. The second volatile switching layer includes hafnium oxide and has a higher electrical resistance than the first and third volatile switching layers.
Techniques for MRAM top electrode via connection
Some embodiments relate to an integrated chip. The integrated chip includes a first memory cell overlying a substrate and a second memory cell overlying the substrate. A dielectric structure overlies the substrate. A trench extends into the dielectric structure and is spaced laterally between the first memory cell and the second memory cell. A dielectric layer is disposed within the trench.
Techniques for MRAM top electrode via connection
Some embodiments relate to a method for forming a memory device. The method includes forming a first memory cell over a substrate and forming a second memory cell over the substrate. Further, an inter-level dielectric (ILD) layer is formed over the substrate such that the ILD layer comprises sidewalls defining a first trough between the first memory cell and the second memory cell. In addition, a first dielectric layer is formed over the ILD layer and within the first trough.
TECHNIQUES FOR MRAM MTJ TOP ELECTRODE CONNECTION
Some embodiments relate to a semiconductor structure having a magnetic tunnel junction (MTJ) on a substrate and a top electrode on the MTJ. A first segment of a top surface of the top electrode adjacent to a first sidewall of the top electrode is different from a second segment of the top surface of the top electrode adjacent to a second sidewall of the top electrode. A sidewall spacer comprises a first spacer on the first sidewall of the top electrode and a second spacer on the second sidewall of the top electrode. A first surface of the first spacer comprises a first curve and a second surface of the second spacer comprises a second curve. A dielectric layer is around the MTJ and top electrode.
MEMORY DEVICE AND SEMICONDUCTOR DIE, AND METHOD OF FABRICATING MEMORY DEVICE
A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.
Magnetoresistive memory device including a magnesium containing dust layer
Magnetoelectric or magnetoresistive memory cells include a magnesium containing nonmagnetic metal dust layer located between a free layer and a dielectric capping layer.
Magnetoresistive memory device including a magnesium containing dust layer
Magnetoelectric or magnetoresistive memory cells include a magnesium containing nonmagnetic metal dust layer located between a free layer and a dielectric capping layer.
MAGNETIC STORAGE DEVICE
A magnetic storage device includes a magnetoresistance effect element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a non-magnetic layer between the first and second magnetic layers. The first magnetic layer includes a first layer that is magnetic, a second layer that is magnetic and farther from the non-magnetic layer than the first layer, and a third layer between the first and second layers. The third layer includes a first portion formed of an insulating material or a semiconductor material and a plurality of second portions surrounded by the first portion and formed of a conductive material.
Magnetic sensor, sensor module, and diagnostic device
According to one embodiment, a magnetic sensor includes a first element, a first wire, and a first magnetic part. The first element includes a first magnetic layer, a first counter magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and the first counter magnetic layer. A direction from the first counter magnetic layer toward the first magnetic layer is along a first direction. The first wire extends in a second direction crossing the first direction. The first magnetic part includes a first region and a first counter region. At least a portion of the first wire is between the first region and the first counter region in the first direction.