Patent classifications
H01F10/3272
BiSb topological insulator with novel buffer layer that promotes a BiSb (012) orientation
A spin-orbit torque (SOT) magnetic tunnel junction (MTJ) device includes a substrate, a buffer layer formed over the substrate, and a bismuth antimony (BiSb) layer formed over the buffer layer, the BiSb layer having a (012) orientation. In certain embodiments, the SOT MTJ device is part of a microwave assisted magnetic recording (MAMR) write head. In certain embodiments, the SOT MTJ device is part of a magnetoresistive random access memory (MRAM) device.
Storage element
A storage element is provided. The storage element includes a memory layer; a fixed magnetization layer; an intermediate layer including a non-magnetic material; wherein the intermediate layer is provided between the memory layer and the fixed magnetization layer; wherein the fixed magnetization layer includes at least a first magnetic layer, a second magnetic layer, and a non-magnetic layer, and wherein the first magnetic layer includes a CoFeB composition. A memory apparatus and a magnetic head are also provided.
Crystal seed layer for magnetic random access memory (MRAM)
Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.
VOLTAGE-CONTROLLED MAGNETIC ANISOTROPY MEMORY DEVICE INCLUDING AN ANISOTROPY-ENHANCING DUST LAYER AND METHODS FOR FORMING THE SAME
A magnetoelectric memory device includes a magnetic tunnel junction located between a first electrode and a second electrode. The magnetic tunnel junction includes a reference layer, a nonmagnetic tunnel barrier layer, a free layer, and a dielectric capping layer. At least one layer that provides voltage-controlled magnetic anisotropy is provided within the magnetic tunnel junction, which may include a pair of nonmagnetic metal dust layers located on, or within, the free layer, or a two-dimensional metal compound layer including a compound of a nonmagnetic metallic element and a nonmetallic element.
VOLTAGE-CONTROLLED MAGNETIC ANISOTROPY MEMORY DEVICE INCLUDING AN ANISOTROPY-ENHANCING DUST LAYER AND METHODS FOR FORMING THE SAME
A magnetoelectric memory device includes a magnetic tunnel junction located between a first electrode and a second electrode. The magnetic tunnel junction includes a reference layer, a nonmagnetic tunnel barrier layer, a free layer, and a dielectric capping layer. At least one layer that provides voltage-controlled magnetic anisotropy is provided within the magnetic tunnel junction, which may include a pair of nonmagnetic metal dust layers located on, or within, the free layer, or a two-dimensional metal compound layer including a compound of a nonmagnetic metallic element and a nonmetallic element.
MAGNETORESISTIVE STACK WITHOUT RADIATED FIELD, SENSOR AND MAGNETIC MAPPING SYSTEM COMPRISING SUCH A STACK
A magnetoresistive stack includes a reference layer including a magnetic layer, an antiferromagnetic layer in exchange coupling with the magnetic layer, a magnetic layer substantially of the same magnetisation as the magnetic layer, a spacer layer between the magnetic layers with a thickness for enabling an antiferromagnetic coupling between the magnetic layers of a first coupling intensity, a free layer having a coercivity of less than 10 microTesla, the free layer including a magnetic layer, an antiferromagnetic layer in exchange coupling with the magnetic layer, a magnetic layer substantially of the same magnetisation as the magnetic layer, a spacer layer between the magnetic layers with a thickness for enabling an antiferromagnetic coupling between the magnetic layers of a second coupling intensity lower than the first coupling intensity, a third spacer layer separating the reference and free layers.
TUNNEL MAGNETO-RESISTIVE (TMR) SENSOR WITH PERPENDICULAR MAGNETIC TUNNELING JUNCTION (P-MTJ) STRUCTURES
The present disclosure relates to integrated circuits, and more particularly, a tunnel magneto-resistive (TMR) sensor with perpendicular magnetic tunneling junction (p-MTJ) structures and methods of manufacture and operation. The structure includes: a first magnetic tunneling junction (MTJ) structure on a first level; a second MTJ structure on a same wiring level as the first MTJ structure; and at least one metal line between the first MTJ structure and the second MTJ structure.
Magnetic Memory Element Incorporating Dual Perpendicular Enhancement Layers
The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating two magnetic free layers separated by a perpendicular enhancement layer (PEL) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic reference layer structure includes first, second, and third magnetic reference layers separated by two PELs and having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The magnetic fixed layer has a second invariable magnetization direction substantially opposite to the first invariable magnetization direction.
Two terminal spin orbit memory devices and methods of fabrication
A memory device includes a first electrode including a spin-orbit material, a magnetic junction on a portion of the first electrode and a first structure including a dielectric on a portion of the first electrode. The first structure has a first sidewall and a second sidewall opposite to the first sidewall. The memory device further includes a second structure on a portion of the first electrode, where the second structure has a sidewall adjacent to the second sidewall of the first structure. The memory device further includes a first conductive interconnect above and coupled with each of the magnetic junction and the second structure and a second conductive interconnect below and coupled with the first electrode, where the second conductive interconnect is laterally distant from the magnetic junction and the second structure.
Magnetic device with a hybrid free layer stack
In one aspect, the disclosed technology relates to a magnetic device, which may be a magnetic memory and/or logic device. The magnetic device can comprise a seed layer; a first free magnetic layer provided on the seed layer; an interlayer provided on the first free magnetic layer; a second free magnetic layer provided on the interlayer; a tunnel barrier provided on the second free magnetic layer; and a fixed magnetic layer. The first free magnetic layer and the second free magnetic layer can be ferromagnetically coupled across the interlayer through exchange interaction.