The present application discloses a semiconductor manufacturing apparatus, including: a chamber including an inner chamber, an outer chamber and a passage communicating the inner chamber with the outer chamber, the passage being located between the inner chamber and a chamber sidewall; and one or more electrodes disposed in the chamber sidewall and configured to ionize a treating gas coming from the inner chamber to generate plasma so as to clean off deposit produced in the inner chamber.

A method for pulsing is described. The method includes generating a first radio frequency (RF) signal, and pulsing a parameter of the first RF signal between a first parameter level and a second parameter level at a pulsing frequency during a cycle of a digital pulsed signal. The method further includes generating a second RF signal, and pulsing a parameter of the second RF signal at a higher pulsing frequency than the pulsing frequency of the parameter of the first RF signal during the cycle. During the cycle, a start time of pulsing the parameter of the first RF signal is synchronized with a start time of pulsing the parameter of the second RF signal and an end time of pulsing the parameter of the first RF signal is synchronized with an end time of pulsing the parameter of the second RF signal.

In some implementations, a method for performing a plasma process in a chamber is provided, including: supplying a process gas to the chamber; applying pulsed RF power to the process gas in the chamber, the pulsed RF power being provided at a predefined frequency, wherein the applying of the pulsed RF power to the process gas generates a plasma in the chamber; during the applying of the RF power, applying a pulsed DC current to a magnetic coil that is disposed over the chamber, wherein the pulsed DC current is provided at the predefined frequency.

Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.

Epitaxial regions may be formed in specific locations on a semiconductor wafer with specific asymmetric properties such as slope or tilt direction, slope or tilt angle, and/or other asymmetric properties. The asymmetric epitaxial regions may be formed using various plasma-based fin structure etching techniques described herein. The specific asymmetric properties may increase metal landing coverage areas in particular locations on the semiconductor wafer (e.g., that are optimized for particular locations on the semiconductor substrate) to reduce the contact resistance between the epitaxial regions and associated conductive structures that are formed to the epitaxial regions. This increases semiconductor device performance, decreases the rate and/or likelihood of defect formation, and/or increases semiconductor device yield, among other examples.

An etching apparatus includes: a chamber; a substrate support disposed in the chamber; one or more heaters disposed in the substrate support; a gas supply; a plasma generator; a controller configured to perform an etching process comprising a plurality of cycles; and a heater controller. Each cycle includes: controlling the gas supply to supply a precursor into the chamber, thereby forming a precursor layer on a substrate supported by the substrate support, the substrate including a film and a mask; and controlling the gas supply and the plasma generator to supply a process gas into the chamber and generate a plasma from the process gas in the chamber, thereby etching the film through the mask.

A plasma deposition system comprising a wafer platform, a second electrode, a first electrode, a first high voltage pulser, and a second high voltage pulser. In some embodiments, the second electrode may be disposed proximate with the wafer platform. In some embodiments, the second electrode can include a disc shape with a central aperture; a central axis, an aperture diameter, and an outer diameter. In some embodiments, the first electrode may be disposed proximate with the wafer platform and within the central aperture of the second electrode. In some embodiments, the first electrode can include a disc shape, a central axis, and an outer diameter. In some embodiments, the first high voltage pulser can be electrically coupled with the first electrode. In some embodiments, the second high voltage pulser can be electrically coupled with the second electrode.

The inventive concept provides a substrate processing apparatus. The substrate processing apparatus may include a chamber having an interior space, a support unit that supports a substrate in the interior space, a ring unit disposed on an edge region of the support unit when viewed from above, an impedance control unit electrically connected to the ring unit to control a flow or density of plasma in an edge region of the substrate and a filter unit disposed between the ring unit and the impedance control unit.

A RF power generator has a RF power source configured to generate an output signal. A power splitter is configured to receive the output signal and generate a plurality of split signals. A demagnetizing circuit is configured to receive the plurality of split signals. The demagnetizing circuit is configured to include a plurality of inductances corresponding to the plurality of split signals. The plurality of inductances is configured to reduce the effects of mutual impedance of an ICP chamber in series with the plurality of inductances so that a ratio between a pair of the plurality of split signals varies substantially linearly as one of the pair of the plurality of split signals is varied.

Embodiments of the present disclosure generally relate to a system used in a semiconductor device manufacturing process. More specifically, embodiments provided herein generally include apparatus and methods for synchronizing and controlling the delivery of an RF bias voltage signal and a pulsed voltage waveform to one or more electrodes within a plasma processing chamber. Embodiments of the disclosure include a method and apparatus for synchronizing a pulsed radio frequency (RF) waveform to a pulsed voltage (PV) waveform, such that the pulsed RF waveform is on during a first stage of the PV waveform and off during a second stage. The first stage of the PV waveform includes a sheath collapse stage. The second stage of the PV waveform includes an ion current stage.