Patent classifications
H01J37/32385
Control of wafer bow in multiple stations
A system for controlling of wafer bow in plasma processing stations is described. The system includes a circuit that provides a low frequency RF signal and another circuit that provides a high frequency RF signal. The system includes an output circuit and the stations. The output circuit combines the low frequency RF signal and the high frequency RF signal to generate a plurality of combined RF signals for the stations. Amount of low frequency power delivered to one of the stations depends on wafer bow, such as non-flatness of a wafer. A bowed wafer decreases low frequency power delivered to the station in a multi-station chamber with a common RF source. A shunt inductor is coupled in parallel to each of the stations to increase an amount of current to the station with a bowed wafer. Hence, station power becomes less sensitive to wafer bow to minimize wafer bowing.
ION GENERATOR AND ION IMPLANTER
An ion generator includes an arc chamber defining a plasma generation space, and a cathode which emits thermoelectrons toward the plasma generation space. The arc chamber includes a box-shaped main body having an opening, and a slit member mounted to cover the opening and provided with a front slit. An inner surface of the main body is exposed to the plasma generation space made of a refractory metal material. The slit member includes an inner member made of graphite and an outer member made of another refractory metal material. The outer member includes an outer surface exposed to an outside of the arc chamber. The inner member includes an inner surface exposed to the plasma generation space, and an opening portion which forms the front slit extending from the inner surface of the inner member to the outer surface of the outer member.
Ion generator and ion implanter
An ion generator includes: an arc chamber which defines a plasma generation space; a cathode which emits thermoelectrons toward the plasma generation space; and a repeller which faces the cathode with the plasma generation space interposed therebetween. The arc chamber includes a box-shaped main body on which a front side is open, and a slit member which is mounted to the front side of the main body and provided with a front slit for extracting ions. An inner surface of the main body which is exposed to the plasma generation space is made of a refractory metal material, and an inner surface of the slit member which is exposed to the plasma generation space is made of graphite.
SUBSTRATE SUPPORT STAGE, PLASMA PROCESSING SYSTEM, AND METHOD OF MOUNTING EDGE RING
A substrate support stage includes a substrate mounting surface on which a substrate is mounted and a ring mount on which an edge ring is mounted. The edge ring is disposed so as to surround the substrate mounted on the substrate mounting surface. The ring mount is provided with a plurality of gas ejection ports configured to eject a gas toward a lower surface side of the edge ring to levitate the edge ring while the edge ring is being mounted on the ring mount, thereby allowing the gas to flow out from a gap between inner and outer peripheries of the lower surface side of the edge ring and the ring mount.
PLASMA SOURCE AND METHOD OF OPERATING THE SAME
A plasma source (100), comprises an outer face (10) with an aperture (14) for delivering a plasma from the aperture. A transport mechanism is configured to transport a substrate (11) and the plasma source relative to each other parallel to the outer face, with a substrate surface to be processed in parallel with at least a part of the outer face that contains the aperture. First (4-1) and second tile (4-2) are arranged within a first plane of a working electrode (22) with neighbouring edges (12) bordering a first plasma collection space (6-1) and a third tile (4-3) is arranged in a second plane of the working electrode parallel to the first plane such that the third tile overlaps neighbouring edges in the first plane. At least one of the working and counter electrodes comprises a local modification (13,15) near said neighbouring edges to increase a plasma delivery to the aperture compensating for loss of plasma collection due to the neighbouring edges.
PE-CVD APPARATUS AND METHOD
A capacitively coupled Plasma Enhanced Chemical Vapour Deposition (PE-CVD) apparatus has a chamber, a first electrode with a substrate support positioned in the chamber, a second electrode with a gas inlet structure positioned in the chamber, and an RF power source connected to the gas inlet structure for supplying RF power thereto. The gas inlet structure has an edge region, a central region which depends downwardly with respect to the edge region, and one or more precursor gas inlets for introducing a PE-CVD precursor gas mixture to the chamber. The edge region and the central region both constitute part of the second electrode. The precursor gas inlets are disposed in the edge region and the central region is spaced apart from the substrate support to define a plasma dark space channel.
Geometrically selective deposition of dielectric films utilizing low frequency bias
Apparatus and methods for depositing and treating or etching a film are described. A batch processing chamber includes a plurality of processing regions with at least one plasma processing region. A low frequency bias generator is connected to a susceptor assembly to intermittently apply a low frequency bias to perform a directional treatment or etching the deposited film.
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
A substrate processing apparatus are provided. The substrate processing apparatus allows a supply flow rate per unit time for process gas supplied to the central area of a substrate to be greater than a supply flow rate per unit time for process gas supplied to an edge area of the substrate, when processing the edge area of the substrate supported by the chuck.
WAFER ETCHING PROCESS AND METHODS THEREOF
A method includes bonding a first surface of a first semiconductor substrate to a first surface of a second semiconductor substrate and forming a cavity in the first area of the first semiconductor substrate, where forming the cavity comprises: supplying a passivation gas mixture that deposits a passivation layer on a bottom surface and sidewalls of the cavity, where during deposition of the passivation layer, a deposition rate of the passivation layer on the bottom surface of the cavity is the same as a deposition rate of the passivation layer on sidewalls of the cavity; and etching the first area of the first semiconductor substrate using an etching gas, where the etching gas is supplied concurrently with the passivation gas mixture, etching the first area of the first semiconductor substrate comprises etching in a vertical direction at a greater rate than etching in a lateral direction.
FILM PROCESSING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
A film processing method includes forming a target film, the target film having an upper surface. The method includes forming a carbon film on the upper surface of the target film. The method includes performing a first etching to format least one recess in the target film, with the carbon film serving as a mask. The method includes performing a second etching, by directing an ion beam through the at least one recess, to increase a depth of the at least one recess.